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VOUT

VIN

TPS84210

SENSE+

VADJ

AGNDPGND

OUT

PWRGD

RT/CLK

INH/UVLO

SS/TR

STSEL

SET

OUT

100

0 0.5 1 1.5 2

Output Current (A)

Efficiency (%)

= 5 V, V

OUT

= 3.3 V, f

= 1.5 MHz

= 3.3 V, V

OUT

= 1.8 V, f

= 1 MHz

G000

TPS84210

www.ti.com

SLUSAN7A –SEPTEMBER 2011–REVISED MARCH 2012

2.95-V to 6-V Input, 2-A Synchronous Buck, Integrated Power Solution

Check for Samples: TPS84210

FEATURES

DESCRIPTION

The TPS84210RKG is an easy-to-use integrated

• Complete Integrated Power Solution Allows

power solution that combines a 2-A DC/DC converter

Small Footprint, Low-Profile Design

with power MOSFETs, an inductor, and passives into

• Efficiencies Up To 96%

a low profile, BQFN package. This total power

• Wide-Output Voltage Adjust

solution requires as few as 3 external components

and eliminates the loop compensation and magnetics

0.8 V to 3.6 V, with ±1% Reference Accuracy

part selection process.

• Adjustable Switching Frequency

(500 kHz to 2 MHz)

The 9×11×2.8 mm BQFN package is easy to solder

onto a printed circuit board and allows a compact

• Synchronizes to an External Clock

point-of-load design with greater than 90% efficiency

• Adjustable Slow-Start

and excellent power dissipation with a thermal

• Output Voltage Sequencing / Tracking

impedance of 12°C/W junction to ambient. The

device delivers the full 2-A rated output current at

• Power Good Output

85°C ambient temperature without airflow.

• Programmable Undervoltage Lockout (UVLO)

The TPS84210 offers the flexibility and the feature-

• Output Overcurrent Protection

set of a discrete point-of-load design and is ideal for

• Over Temperature Protection

powering performance DSPs and FPGAs. Advanced

• Operating Temperature Range: –40°C to 85°C

packaging technology afford a robust and reliable

power solution compatible with standard QFN

• Enhanced Thermal Performance: 12°C/W

mounting and testing techniques.

• Meets EN55022 Class B Emissions

• For Design Help Including SwitcherPro™ visit

http://www.ti.com/TPS84210

SIMPLIFIED APPLICATION

APPLICATIONS

• Broadband & Communications Infrastructure

• Automated Test and Medical Equipment

• Compact PCI / PCI Express / PXI Express

• DSP and FPGA Point of Load Applications

• High Density Distributed Power Systems

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2SwitcherPro is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (32 pages)

PAGE 1
TPS84210 www.ti.com SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 2.95-V to 6-V Input, 2-A Synchronous Buck, Integrated Power Solution Check for Samples: TPS84210 FEATURES DESCRIPTION • The TPS84210RKG is an easy-to-use integrated power solution that combines a 2-A DC/DC converter with power MOSFETs, an inductor, and passives into a low profile, BQFN package. This total power solution requires as few as 3 external components and eliminates the loop compensation and magnetics part selection process.
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TPS84210 SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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TPS84210 www.ti.com SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 THERMAL INFORMATION TPS84210 THERMAL METRIC (1) RKG39 UNIT 39 PINS θJA Junction-to-ambient thermal resistance (2) 12 (3) ψJT Junction-to-top characterization parameter ψJB Junction-to-board characterization parameter (4) (1) (2) (3) (4) 2.2 °C/W 9.7 For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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TPS84210 SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 www.ti.com ELECTRICAL CHARACTERISTICS Over -40°C to 85°C free-air temperature, VIN = 3.3 V, VOUT = 1.8 V, IOUT = 2A, CIN1 = 47 µF ceramic, CIN2 = 220 µF poly-tantalum, COUT1 = 47 µF ceramic, COUT2 = 100 µF poly-tantalum (unless otherwise noted) PARAMETER TEST CONDITIONS IOUT Output current TA = 85°C, natural convection VIN Input voltage range Over IOUT range UVLO VIN Undervoltage lockout VOUT(adj) VOUT Over IOUT range 0.
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TPS84210 www.ti.com SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 ELECTRICAL CHARACTERISTICS (continued) Over -40°C to 85°C free-air temperature, VIN = 3.3 V, VOUT = 1.
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TPS84210 SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 www.ti.com PIN DESCRIPTIONS TERMINAL NAME DESCRIPTION NO. 1 5 AGND 29 33 Zero VDC reference for the analog control circuitry. These pins should be connected directly to the PCB analog ground plane. Not all pins are connected together internally. All pins must be connected together externally with a copper plane or pour directly under the module.
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TPS84210 www.ti.
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TPS84210 SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 www.ti.com TYPICAL CHARACTERISTICS (VIN = 5 V) (1) 100 (2) 14 Output Voltage Ripple (mV) 95 Efficiency (%) 90 85 80 75 VOUT = 3.3 V, fSW = 1.5 MHz VOUT = 2.5 V, fSW = 1.5 MHz VOUT = 1.8 V, fSW = 1 MHz VOUT = 1.2 V, fSW = 750 kHz VOUT = 0.8 V, fSW = 650 kHz 70 65 60 0 0.5 1 Output Current (A) 1.5 12 10 6 2 VOUT = 3.3 V, fSW = 1.5 MHz VOUT = 2.5 V, fSW = 1.5 MHz VOUT = 1.8 V, fSW = 1 MHz VOUT = 1.2 V, fSW = 750 kHz VOUT = 0.
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TPS84210 www.ti.com SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 TYPICAL CHARACTERISTICS (VIN = 3.3 V) (1) 100 (2) 12 Output Voltage Ripple (mV) 95 Efficiency (%) 90 85 80 75 70 VOUT = 1.8 V, fSW = 1 MHz VOUT = 1.2 V, fSW = 750 kHz VOUT = 0.8 V, fSW = 650 kHz 65 60 0 0.5 1 Output Current (A) 1.5 10 8 6 4 2 VOUT = 1.8 V, fSW = 1 MHz VOUT = 1.2 V, fSW = 750 kHz VOUT = 0.8 V, fSW = 650 kHz 0 Figure 6. Efficiency vs. Output Current 1 Output Current (A) 1.5 2 G000 Figure 7.
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TPS84210 SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 www.ti.com APPLICATION INFORMATION ADJUSTING THE OUTPUT VOLTAGE The VADJ control sets the output voltage of the TPS84210. The output voltage adjustment range is from 0.8V to 3.6V. The adjustment method requires the addition of RSET, which sets the output voltage, the connection of SENSE+ to VOUT, and in some cases RRT which sets the switching frequency. The RSET resistor must be connected directly between the VADJ (pin 35) and AGND (pin 33 & 34).
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TPS84210 www.ti.com SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 CAPACITOR RECOMMENDATIONS FOR THE TPS84210 POWER SUPPLY Capacitor Technologies Electrolytic, Polymer-Electrolytic Capacitors When using electrolytic capacitors, high-quality, computer-grade electrolytic capacitors are recommended. Polymer-electrolytic type capacitors are recommended for applications where the ambient operating temperature is less than 0°C.
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TPS84210 SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 www.ti.com Table 4. Output Voltage Transient Response CIN1 = 1 x 47 µF CERAMIC, CIN2 = 220 µF POLYMER-TANTALUM, LOAD STEP = 1 A, 1 A/µs VOUT (V) VIN (V) 3.3 0.8 5 3.3 1.2 5 3.3 1.8 5 2.5 5 3.
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TPS84210 www.ti.com SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 Transient Response Figure 11. VIN = 5V, VOUT = 0.8V, 1A Load Step Figure 12. VIN = 3.3V, VOUT = 0.8V, 1A Load Step Figure 13. VIN = 5V, VOUT = 1.2V, 1A Load Step Figure 14. VIN = 3.3V, VOUT = 1.
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TPS84210 SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 14 www.ti.com Figure 15. VIN = 5V, VOUT = 1.8V, 1A Load Step Figure 16. VIN = 3.3V, VOUT = 1.8V, 1A Load Step Figure 17. VIN = 5V, VOUT = 2.5V, 1A Load Step Figure 18. VIN = 5V, VOUT = 3.
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TPS84210 www.ti.com SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 Application Schematics VIN 2.95 V to 6 V VIN + CIN2 220 F TPS84210 PWRGD CIN1 47 F VOUT 1.2 V SENSE+ VOUT INH/UVLO COUT1 + 47 F COUT2 100 F RT/CLK RRT 715 k SS/TR VADJ STSEL PGND AGND RSET 2.87 k Figure 19. Typical Schematic VIN = 2.95 V to 6.0 V, VOUT = 1.2 V VIN 4.4 V to 6 V VIN + CIN2 220 F TPS84210 PWRGD CIN1 47 F VOUT 3.
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TPS84210 SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 www.ti.com Power Good (PWRGD) The PWRGD pin is an open drain output. Once the voltage on the SENSE+ pin is between 93% and 105% of the set voltage, the PWRGD pin pull-down is released and the pin floats. The recommended pull-up resistor value is between 10 kΩ and 100 kΩ to a voltage source that is 6 V or less. The PWRGD pin is in a defined state once VIN is greater than 1.2 V, but with reduced current sinking capability.
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TPS84210 www.ti.com SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 Output On/Off Inhibit (INH) The INH pin provides electrical on/off control of the device. Once the INH pin voltage exceeds the threshold voltage, the device starts operation. If the INH pin voltage is pulled below the threshold voltage, the regulator stops switching and enters low quiescent current state. The INH pin has an internal pull-up current source, allowing the user to float the INH pin for enabling the device.
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TPS84210 SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 www.ti.com Slow Start (SS/TR) Connecting the STSEL pin to AGND and leaving SS/TR pin open enables the internal SS capacitor with a slow start interval of approximately 1.1 ms. Adding additional capacitance between the SS pin and AGND increases the slow start time. Table 6 shows an additional SS capacitor connected to the SS/TR pin and the STSEL pin connected to AGND. See Table 6 below for SS capacitor values and timing interval.
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TPS84210 www.ti.com SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 Synchronization (CLK) An internal phase locked loop (PLL) has been implemented to allow synchronization between 500 kHz and 2 MHz, and to easily switch from RT mode to CLK mode. To implement the synchronization feature, connect a square wave clock signal to the RT/CLK pin with a minimum pulse width of 75 ns. The maximum clock pulse width must be calculated using Equation 2. The clock signal amplitude must transition lower than 0.
PAGE 20
TPS84210 SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 www.ti.com Sequencing (SS/TR) Many of the common power supply sequencing methods can be implemented using the SS/TR, INH and PWRGD pins. The sequential method is illustrated in Figure 29 using two TPS84210 devices. The PWRGD pin of the first device is coupled to the INH pin of the second device which enables the second power supply once the primary supply reaches regulation. Do not place a pull-up resistor on PWRGD in this configuration.
PAGE 21
TPS84210 www.ti.com SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 Programmable Undervoltage Lockout (UVLO) The TPS84210 implements internal UVLO circuitry on the VIN pin. The device is disabled when the VIN pin voltage falls below the internal VIN UVLO threshold. The internal VIN UVLO rising threshold is 3.135 V (max) with a typical hysteresis of 300 mV. If an application requires a higher UVLO threshold on the VIN pin, the UVLO pin can be configured as shown in Figure 33.
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TPS84210 SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 www.ti.com Thermal Shutdown The internal thermal shutdown circuitry forces the device to stop switching if the junction temperature exceeds 175°C typically. The device reinitiates the power up sequence when the junction temperature drops below 160°C typically. Layout Considerations To achieve optimal electrical and thermal performance, an optimized PCB layout is required. Figure 34, shows a typical PCB layout.
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TPS84210 www.ti.com SLUSAN7A – SEPTEMBER 2011 – REVISED MARCH 2012 EMI The TPS84210 is compliant with EN55022 Class B radiated emissions. Figure 36 and Figure 37 show typical examples of radiated emissions plots for the TPS84210 operating from 5V and 3.3V respectively. Both graphs include the plots of the antenna in the horizontal and vertical positions. Figure 36. Radiated Emissions 5-V Input, 1.8-V Output, 2-A Load (EN55022 Class B) Figure 37. Radiated Emissions 3.3-V Input, 1.
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PACKAGE OPTION ADDENDUM www.ti.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.