Datasheet

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GND

DOUT1C2+

C1−

V+

C1+

TOP VIEW

DOUT2

RIN1

DIN2

DIN1

V−

C2−

10 ROUT1ROUT2

DIN3

PW OR DW PACKAGE

RIN2

DOUT3

PWRDOWN

TRS3386E

www.ti.com

SLLS829C –APRIL 2007– REVISED MARCH 2011

RS-232 TRANSCEIVER WITH SPLIT SUPPLY PIN FOR LOGIC SIDE

Check for Samples: TRS3386E

FEATURES

APPLICATIONS

• Hand-Held Equipment

• V

Pin for Compatibility With Mixed-Voltage

Systems Down to 2.5 V on Logic Side

• PDAs

• Enhanced ESD Protection on RIN Inputs and

• Cell Phones

DOUT Outputs

• Battery-Powered Equipment

– ±15-kV Human-Body Model

• Data Cables

– ±15-kV IEC 61000-4-2, Air-Gap Discharge

– ±8-kV IEC 61000-4-2, Contact Discharge

• Low 300-μA Supply Current

• Specified 250-kbps Data Rate

• 1-μA Low-Power Shutdown

• Meets EIA/TIA-232 Specifications Down

to 3 V

• Designed to be Interchangeable With Industry

Standard '3386 Devices

DESCRIPTION/ORDERING INFORMATION

The TRS3386E is a three-driver and two-receiver RS-232 interface device, with split supply pins for mixed-signal

operations. All RS-232 inputs and outputs are protected to ±15 kV using the IEC 61000-4-2 Air-Gap Discharge

method, ±8 kV using the IEC 61000-4-2 Contact Discharge method, and ±15 kV using the Human-Body Model.

The charge pump requires only four small 0.1-μF capacitors for operation from a 3.3-V supply. The TRS3386E is

capable of running at data rates up to 250 kbps, while maintaining RS-232-compliant output levels.

The TRS3386E has a unique V

pin that allows operation in mixed-logic voltage systems. Both driver in (DIN)

and receiver out (ROUT) logic levels are pin programmable through the V

pin. The TRS3386E is available in a

space-saving thin shrink small-outline package (TSSOP).

ORDERING INFORMATION

PACKAGE

(1) (2)

ORDERABLE PART NUMBER TOP-SIDE MARKING

TSSOP – PW TRS3386ECPWR RV86EC

0°C to 70°C

SOIC – DW TRS3386ECDWR TRS3386EC

TSSOP – PW TRS3386EIPWR RV86EI

–40°C to 85°C

SOIC – DW TRS3386EIDWR TRS3386EI

(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (19 pages)

PAGE 1
TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com RS-232 TRANSCEIVER WITH SPLIT SUPPLY PIN FOR LOGIC SIDE Check for Samples: TRS3386E FEATURES APPLICATIONS • • • • • • 1 • • • • • • VL Pin for Compatibility With Mixed-Voltage Systems Down to 2.
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TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com Table 1.
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TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com TERMINAL FUNCTIONS TERMINAL NAME DESCRIPTION NO. C1+ 1 Positive terminal of the voltage-doubler charge-pump capacitor V+ 2 5.5-V supply generated by the charge pump C1– 3 Negative terminal of the voltage-doubler charge-pump capacitor C2+ 4 Positive terminal of the inverting charge-pump capacitor C2– 5 Negative terminal of the inverting charge-pump capacitor V– 6 –5.
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TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com Recommended Operating Conditions MIN MAX VCC Supply voltage 3 5.5 V VL Supply voltage 2.25 VCC V Input logic threshold low DIN, PWRDWN Input logic threshold high DIN, PWRDWN VL = 3 V or 5.5 V 0.8 VL = 2.3 V 0.6 VL = 5.5 V 2.4 VL = 3 V 2.0 VL = 2.7 V 1.
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TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com RECEIVER SECTION Electrical Characteristics over operating free-air temperature range, VCC = VL = 3 V to 5.5 V, C1–C4 = 0.1 μF (tested at 3.3 V ± 10%), C1 = 0.047 μF, C2–C4 = 0.33 μF (tested at 5 V ± 10%), TA = TMIN to TMAX (unless otherwise noted) PARAMETER TEST CONDITIONS Ioff Output leakage current ROUT, receivers disabled VOL Output voltage low IOUT = 1.
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TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com DRIVER SECTION Electrical Characteristics over operating free-air temperature range, VCC = VL = 3 V to 5.5 V, C1–C4 = 0.1 μF (tested at 3.3 V ± 10%), C1 = 0.047 μF, C2–C4 = 0.33 μF (tested at 5 V ± 10%), TA = TMIN to TMAX (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP (1) ±5 ±5.
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TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com APPLICATION INFORMATION 3.3 V 20 CBYPASS C1 0.1mF C2 0.1mF TTL/CMOS Inputs 19 12 PWRDWN V CC 1 C1+ 3 VL V+ 2 C3 0.1µF C1− 4 C2+ 5 C2− V− 6 7 DIN1 DOUT1 17 DIN2 DOUT2 16 DIN3 DOUT3 15 C4 0.
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TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION 3V Input Generator (see Note B) 1.5 V RS-232 Output 50 Ω RL 1.5 V 0V CL (see Note A) tTHL 3V PWRDWN tTLH VOH 3V 3V Output −3 V −3 V VOL TEST CIRCUIT VOLTAGE WAVEFORMS SR(tr) + t THL 6V or t TLH NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 1.
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TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (Continued) VCC GND S1 RL 3 V or 0 V Output CL (see Note A) PWRDWN 3V Input 1.5 V 0V tPZH (S1 at GND) tPHZ S1 at GND) VOH Output 50% 0.3 V Generator (see Note B) 1.5 V 50 Ω tPLZ (S1 at VCC) 0.3 V Output 50% VOL tPZL (S1 at VCC) TEST CIRCUIT VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B.
PAGE 10
TRS3386E SLLS829C – APRIL 2007 – REVISED MARCH 2011 www.ti.com REVISION HISTORY Changes from Revision B (April 2009) to Revision C Page • Changed VL Pin for Compatibility With Mixed-Voltage Systems Down to 2.5 V (originally 1.8 V) on the Logic Side. ......... 1 • Changed VL Supply MIN value from 1.65 V to 2.25 V. ......................................................................................................... 4 • Deleted VL = 1.65V parameter from Input logic threshold low. .................
PAGE 11
PACKAGE OPTION ADDENDUM www.ti.
PAGE 12
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
PAGE 13
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing TRS3386ECDWR SOIC TRS3386ECPWR TRS3386EIDWR TRS3386EIPWR SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 13.0 2.7 12.0 24.0 Q1 DW 20 2000 330.0 24.4 10.8 TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.
PAGE 14
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TRS3386ECDWR SOIC DW 20 2000 367.0 367.0 45.0 TRS3386ECPWR TSSOP PW 20 2000 367.0 367.0 38.0 TRS3386EIDWR SOIC DW 20 2000 367.0 367.0 45.0 TRS3386EIPWR TSSOP PW 20 2000 367.0 367.0 38.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.