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TUSB1210

Standalone USB Transceiver Chip Silicon

Data Manual

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Literature Number: SLLSE09F

November 2009–Revised August 2012

Summary of content (64 pages)

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TUSB1210 Standalone USB Transceiver Chip Silicon Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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TUSB1210 www.ti.com SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 Contents 1 2 Features ............................................................................................................................. 6 Description ......................................................................................................................... 7 2.1 2.2 3 4 5 6 7 8 9 2 Terminal Description .......................................................................................................
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TUSB1210 www.ti.com SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 9.1.7 9.1.8 9.1.9 9.1.10 9.1.11 9.1.12 9.1.13 9.1.14 9.1.15 9.1.16 9.1.17 9.1.18 9.1.19 9.1.20 9.1.21 9.1.22 9.1.23 9.1.24 9.1.25 9.1.26 9.1.27 9.1.28 9.1.29 9.1.30 9.1.31 9.1.32 9.1.33 9.1.34 9.1.35 9.1.36 10 Application Information 10.1 10.2 11 12 FUNC_CTRL_CLR ............................................................................................. IFC_CTRL ........................................................................
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 www.ti.com List of Figures .................................................................... 5-1 TUSB1210 Power-Up Timing (ULPI Clock Input Mode) 6-1 USB UART Data Flow ........................................................................................................... 23 10-1 Host or OTG, ULPI Input Clock Mode Application Diagram ................................................................
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TUSB1210 www.ti.com SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 List of Tables 2-1 Terminal Functions ................................................................................................................ 8 4-1 Electrical Characteristics: Clock Input 6-2 ........................................................................................ Electrical Characteristics: REFCLK ........................................................................................... Performances ........
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 www.ti.com Standalone USB Transceiver Chip Silicon Check for Samples: TUSB1210 1 Features • USB2.0 PHY Transceiver Chip, Designed to Interface With a USB Controller via a ULPI Interface, Fully Compliant With: – Universal Serial Bus Specification Rev. 2.0 – On-The-Go Supplement to the USB 2.0 Specification Rev. 1.3 – UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.
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TUSB1210 www.ti.com 2 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 Description The TUSB1210 is a USB2.0 transceiver chip, designed to interface with a USB controller via a ULPI interface. It supports all USB2.0 data rates (High-Speed 480Mbps, Full-Speed 12 Mbps and Low-Speed 1.5Mbps), and is compliant to both Host and Peripheral modes. It additionally supports a UART mode and legacy ULPI serial modes. TUSB1210 also supports the OTG (Ver1.3) optional addendum to the USB 2.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 www.ti.com Table 2-1. Terminal Functions TERMINAL NO. 1 NAME A/D TYPE LEVEL DESCRIPTION I 3.3 V VDD33 Reference clock input (square-wave only). Tie to GND when pin 26 (CLOCK) is required to be Input mode. Connect to square-wave reference clock of amplitude in the range of 3 V to 3.6 V when Pin 26 (CLOCK) is required to be Output mode. See pin 14 (CFG) description for REFCLK input frequency settings.
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TUSB1210 www.ti.com 2.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 3 Electrical Characteristics 3.1 Absolute Maximum Ratings www.ti.com over operating free-air temperature range (unless otherwise noted) (1) PARAMETER VCC Main battery supply voltage CONDITIONS MIN MAX (2) UNIT 0 5 V Where supply represents the voltage applied to the power supply pin associated with the input –0.3 1 × VCC +0.3 V –2 20 V ID, DP, DM inputs Stress condition guaranteed 24h –0.3 5.
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TUSB1210 www.ti.com SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 4 Clock System 4.1 USB PLL Reference Clock The USB PLL block generates the clocks used to synchronize : • the ULPI interface (60 MHz clock) • the USB interface (depending on the USB data rate, 480 Mbps, 12 Mbps or 1.5 Mbps) TUSB1210 requires an external reference clock which is used as an input to the 480 MHz USB PLL block. Depending on the clock configuration, this reference clock can be provided either at REFCLK pin or at CLOCK pin.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 4.4 www.ti.com Clock 32 kHz An internal clock generator running at 32 kHz has been implemented to provide a low-speed, low-power clock to the system Table 4-3. Performances PARAMETER Output duty cycle TEST CONDITIONS Input duty cycle 40–60% Output frequency 4.5 MIN TYP 48 50 52 MAX UNIT % 23 32 38 kHz Reset All logic is reset if CS = 0 or VBAT are not present. All logic (except 32 kHz logic) is reset if VDDIO is not present.
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TUSB1210 www.ti.com 5 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 Power Module This chapter describes the electrical characteristics of the voltage regulators and timing characteristics of the supplies digitally controlled within the TUSB1210. 5.1 Power Providers Table 5-1. Summary of TUSB1210 Power Providers (1) USAGE TYPE TYPICAL VOLTAGE (V) MAXIMUM CURRENT (mA) VDD15 Internal LDO 1.5 50 VDD18 External LDO 1.8 30 VDD33 Internal LDO 3.1 15 NAME (1) 5.1.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 www.ti.com Table 5-3. VDD15 Internal LDO Regulator Characteristics PARAMETER VIN TEST CONDITIONS MIN TYP MAX Input voltage On mode, VIN VDD15 = VBAT 2.7 3.6 4.5 VVDD15 Output voltage VINVDD15 min – VINVDD15 max 1.45 1.56 1.65 IVDD15 Rated output current On mode 5.2 VDD15 UNIT 30 V V mA Power Consumption Table 5-4 describes the power consumption depending on the use cases.
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TUSB1210 www.ti.com 5.3 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 Power Management 5.3.1 5.3.1.1 Power On Sequence Timing Diagram VDDIO, VDD18 ACTIVE COLDRST HWRST OFF NOPWR VBAT , VDD33 IORST CS TVBBDET (10us) ICACT TBGAP (2ms) BGOK TPWONVDD15 (100us) VDD15 DIGPOR CK32K TCK32K_PWON (125us) CK32KOK RESETN_PWR MNTR_(VDD18,VIO)_OK TDELRSTPWR (61us) TDELMNTRVIOEN (91.5us) TMNTR (183.1us) TDELVDD33EN (91.5us) TMNTR (183.1us) MNTR_VDD33_OK (input 60M) CLOCK RESETB TDELRESETB (244.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 5.3.2 www.ti.com Timers and Debounce TYP MAX UNIT TDEL_CS_SUPPLYOK Chip-select-to-supplies OK delay PARAMETER COMMENTS MIN 2.84 4.10 ms TDEL_RST_DIR RESETB to PHY PLL locked and DIR falling-edge delay 0.54 0.
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TUSB1210 www.ti.com SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 6 USB Connectivity 6.1 Timing Parameter Definitions The timing parameter symbols used in the timing requirement and switching characteristic tables are created in accordance with JEDEC Standard 100. To shorten the symbols, some pin names and other related terminologies have been abbreviated as shown in Table 6-1. Table 6-1.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 www.ti.com NOTE LS device mode is not allowed by a USB2.0 HS capable PHY, therefore it is not supported by TUSB1210. This is clearly stated in USB2.0 standard Chapter 7, page 119, second paragraph: “A high-speed capable upstream facing transceiver must not support low-speed signaling mode..” There is also some related commentary in Chapter 7.1.2.3. 6.3.
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TUSB1210 www.ti.com SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 Table 6-4. TUSB1210 Modes vs ULPI Pin Status: USB Suspend Mode (continued) LINK / EXTERNAL RECOMMENDED SETTING DURING SUSPEND MODE SUSPEND MODE PIN NO. PIN NAME DIR PU/PD DIR PU/PD 7 DATA4 O, (‘0’) - I - 9 DATA5 O, (‘0’) - I - 10 DATA6 O, (‘0’) - I - 13 DATA7 O, (‘0’) - I - Table 6-5.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 www.ti.com Built-in pullup and pulldown resistors are used as part of the protocol signaling. Apart from this, the PHY also contains circuitry which protects it from accidental 5-V short on the DP and DM lines. 6.3.3.1 LS/FS Single-Ended Receivers In addition to the differential receiver, there is a single-ended receiver (SE–, SE+) for each of the two data lines D+/–.
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TUSB1210 www.ti.com SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 Table 6-9. LS Transmitter (continued) PARAMETER VCM COMMENTS Downstream eye diagram Ref. USB2.0, covered by eye diagram Differential common mode range Ref. USB2.0 MIN 0.8 TYP MAX 2.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 www.ti.com Table 6-10. FS Transmitter PARAMETER COMMENTS MIN TYP MAX UNIT VOL Low Ref. USB2.0 0 300 mV VOH High (driven) Ref. USB2.0 2.8 3.6 V VCRS Output signal crossover voltage Ref. USB2.0, covered by eye diagram 1.3 2 V tFR Rise time Ref. USB2.0 4 20 ns tFF Fall time Ref. USB2.0 4 20 ns tFRFM Differential rise and fall time matching Ref. USB2.0, covered by eye diagram 90 111.
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TUSB1210 www.ti.com SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 Table 6-12. HS Transmitter PARAMETER COMMENTS MIN TYP MAX UNIT VHSOI High-speed idle level Ref. USB2.0 -10 10 mV VHSOH High-speed data signaling high Ref. USB2.0 360 440 mV VHSOL High-speed data signaling low Ref. USB2.0 -10 10 mV VCHIRPJ Chirp J level (differential voltage) Ref. USB2.0 700 1100 mV VCHIRPK Chirp K level (differential voltage) Ref. USB2.0 -900 -500 mV THSR Rise Time (10% - 90%) Ref.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 www.ti.com Table 6-15. Pullup/Pulldown Resistors PARAMETER COMMENTS MIN TYP MAX UNIT 0.9 1.1 1.575 kΩ 1.425 2.2 3.
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TUSB1210 www.ti.com SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 Table 6-17. OTG ID Electrical PARAMETER COMMENTS MIN TYP 12 20 MAX UNIT ID Comparators — ID External Resistors Specifications RID_GND ID ground comparator ID_GND interrupt RID_FLOAT ID Float comparator ID_FLOAT interrupt 200 28 kΩ 500 kΩ 286 kΩ 3.2 V 5.25 V ID Line RPH_ID_UP Phone ID pullup to VPH_ID_UP ID unloaded (VRUSB) 70 VPH_ID_UP Phone ID pullup voltage Connected to VRUSB 2.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 www.ti.com 7 I/O Electrical Characteristics 7.1 Analog I/O Electrical Characteristics Table 7-1. Electrical Characteristics: Analog Output Pins PARAMETER CONDITIONS MIN TYP MAX UNIT CPEN Output Pin VOLCPEN CPEN low-level output voltage IOL = 3 mA VOHCPEN CPEN high-level output voltage IOH = -3 mA 7.2 0.3 VDD33-0.
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TUSB1210 www.ti.com 8 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 External Components Table 8-1. TUSB1210 External Components FUNCTION COMPONENT REFERENCE VALUE NOTE LINK VDDIO Capacitor CVDDIO 100 nF Suggested value, application dependent Figure 10-1 VDD33 Capacitor CVDD33 2.2 μF Range: [0.45 μF : 6.5 μF] , ESR = [0 : 600 mΩ] for f> 10 kHz Figure 10-1 VDD15 Capacitor CVDD15 2.2 μF Range: [0.45 μF : 6.5 μF] , ESR = [0 : 600 mΩ] for f> 10 kHz Figure 10-1 VDD18 Capacitor Ext 1.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 9 Register Map 9.1 TUSB1210 Product www.ti.com Table 9-1.
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TUSB1210 www.ti.com 9.1.1 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 VENDOR_ID_LO ADDRESS OFFSET 0x00 PHYSICAL ADDRESS 0x00 DESCRIPTION Lower byte of vendor ID supplied by USB-IF (TI Vendor ID = 0x0451) TYPE R INSTANCE USB_SCUSB WRITE LATENCY 7 6 5 4 3 2 1 0 VENDOR_ID 9.1.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 9.1.4 www.ti.com PRODUCT_ID_HI ADDRESS OFFSET 0x03 PHYSICAL ADDRESS 0x03 DESCRIPTION Upper byte of Product ID supplied by Vendor (TUSB1210 Product ID is 0x1507). TYPE R INSTANCE USB_SCUSB WRITE LATENCY 7 6 5 4 3 2 1 0 PRODUCT_ID BITS FIELD NAME 7:00 9.1.5 DESCRIPTION PRODUCT_ID TYPE RESET R 0x15 FUNC_CTRL ADDRESS OFFSET 0x04 PHYSICAL ADDRESS 0x04 DESCRIPTION Controls UTMI function settings of the PHY.
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TUSB1210 www.ti.com BITS 1:00 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 FIELD NAME XCVRSELECT DESCRIPTION Select the required transceiver speed. 0x0: Enable HS transceiver 0x1: Enable FS transceiver 0x2: Enable LS transceiver 0x3: Enable FS transceiver for LS packets TYPE RESET RW 0x1 (FS preamble is automatically pre-pended) 9.1.6 FUNC_CTRL_SET ADDRESS OFFSET 0x05 PHYSICAL ADDRESS 0x05 DESCRIPTION This register doesn't physically exist.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 9.1.8 www.ti.com BITS FIELD NAME TYPE RESET 7 Reserved DESCRIPTION R 0 6 SUSPENDM RW 1 5 RESET RW 0 4:03 OPMODE RW 0x0 2 TERMSELECT RW 0 1:00 XCVRSELECT RW 0x1 IFC_CTRL ADDRESS OFFSET 0x07 PHYSICAL ADDRESS 0x07 DESCRIPTION Enables alternative interfaces and PHY features.
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TUSB1210 www.ti.com BITS 2 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 FIELD NAME CARKITMODE DESCRIPTION Changes the ULPI interface to UART interface. The PHY automatically clear this field when UART mode is exited. TYPE RESET RW 0 RW 0 RW 0 0b: UART disabled. 1b: Enable serial UART mode. 1 FSLSSERIALMODE_3PI Changes the ULPI interface to 3-pin Serial. N The PHY must automatically clear this field when serial mode is exited.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 www.ti.com 9.1.10 IFC_CTRL_CLR ADDRESS OFFSET 0x09 PHYSICAL ADDRESS 0x09 DESCRIPTION This register doesn't physically exist. INSTANCE USB_SCUSB It is the same as the ifc_ctrl register with read/clear-only property (write '1' to clear a particular bit, a write '0' has no-action).
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TUSB1210 BITS 7 7 6 5 4 3 2 1 0 DRVVBUSEXTERNAL DRVVBUS CHRGVBUS DISCHRGVBUS DMPULLDOWN DPPULLDOWN IDPULLUP SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 USEEXTERNALVBUSINDICATOR www.ti.com FIELD NAME DESCRIPTION USEEXTERNALVBUSINDICA Tells the PHY to use an external VBUS over-current indicator.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 www.ti.com 9.1.12 OTG_CTRL_SET ADDRESS OFFSET 0x0B PHYSICAL ADDRESS 0x0B DESCRIPTION This register doesn't physically exist. INSTANCE USB_SCUSB It is the same as the otg_ctrl register with read/set-only property (write '1' to set a particular bit, a write '0' has no-action).
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TUSB1210 5 4 3 2 DRVVBUS CHRGVBUS DISCHRGVBUS DMPULLDOWN 1 0 IDPULLUP 6 DPPULLDOWN 7 DRVVBUSEXTERNAL SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 USEEXTERNALVBUSINDICATOR www.ti.com BITS FIELD NAME TYPE RESET 7 USEEXTERNALVBUSINDICATOR DESCRIPTION RW 0 6 DRVVBUSEXTERNAL RW 0 5 DRVVBUS RW 0 4 CHRGVBUS RW 0 3 DISCHRGVBUS RW 0 2 DMPULLDOWN RW 1 1 DPPULLDOWN RW 1 0 IDPULLUP RW 0 9.1.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 www.ti.com BITS FIELD NAME DESCRIPTION TYPE RESET 2 SESSVALID_RISE Generate an interrupt event notification when SessValid changes from low to high. SessValid is the same as UTMI+ AValid. RW 1 1 VBUSVALID_RISE Generate an interrupt event notification when VbusValid changes from low to high. RW 1 0 HOSTDISCONNECT_RISE Generate an interrupt event notification when Hostdisconnect changes from low to high.
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TUSB1210 7 6 5 4 3 2 1 0 Reserved Reserved IDGND_RISE SESSEN D_RISE SESSVALID_RISE VBUSVALID_RISE HOSTDISCONNECT_RISE SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 Reserved www.ti.com BITS FIELD NAME TYPE RESET 7 Reserved DESCRIPTION R 0 6 Reserved R 0 5 Reserved R 0 4 IDGND_RISE RW 1 3 SESSEND_RISE RW 1 2 SESSVALID_RISE RW 1 1 VBUSVALID_RISE RW 1 0 HOSTDISCONNECT_RISE RW 1 9.1.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 BITS www.ti.com FIELD NAME 0 HOSTDISCONNECT_FALL DESCRIPTION Generate an interrupt event notification when Hostdisconnect changes from high to low. Applicable only in host mode (DpPulldown and DmPulldown both set to 1b). TYPE RESET RW 1 9.1.18 USB_INT_EN_FALL_SET ADDRESS OFFSET 0x11 PHYSICAL ADDRESS 0x11 DESCRIPTION This register doesn't physically exist.
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TUSB1210 BITS 4 3 Reserved IDGND_FALL SESSEND_FALL FIELD NAME 2 1 0 HOSTDISCONNECT_FALL 5 VBUSVALID_FALL 6 SESSVALID_FALL 7 Reserved SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 Reserved www.ti.com TYPE RESET 7 Reserved DESCRIPTION R 0 6 Reserved R 0 5 Reserved R 0 4 IDGND_FALL RW 1 3 SESSEN D_FALL RW 1 2 SESSVALID_FALL RW 1 1 VBUSVALID_FALL RW 1 0 HOSTDISCONNECT_FALL RW 1 9.1.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 BITS www.ti.com TYPE RESET 7 Reserved FIELD NAME DESCRIPTION R 0 6 Reserved R 0 5 Reserved R 0 4 IDGND R 0 Current value of UTMI+ IdGnd output. This bit is not updated if IdPullup bit is reset to 0 and for 50 ms after IdPullup is set to 1. 3 SESSEND Current value of UTMI+ SessEnd output. R 0 2 SESSVALID Current value of UTMI+ SessValid output. SessValid is the same as UTMI+ AValid.
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TUSB1210 www.ti.com BITS SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 TYPE RESET 3 SESSEND_LATCH FIELD NAME Set to 1 by the PHY when an unmasked event occurs on SessEnd. Cleared when this register is read. DESCRIPTION R 0 2 SESSVALID_LATCH Set to 1 by the PHY when an unmasked event occurs on SessValid. Cleared when this register is read. SessValid is the same as UTMI+ AValid. R 0 1 VBUSVALID_LATCH Set to 1 by the PHY when an unmasked event occurs on VbusValid.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 www.ti.com ADDRESS OFFSET 0x16 PHYSICAL ADDRESS 0x16 DESCRIPTION Empty register byte for testing purposes. Software can read, write, set, and clear this register and the PHY functionality will not be affected. TYPE RW INSTANCE USB_SCUSB WRITE LATENCY 7 6 5 4 3 2 1 0 SCRATCH BITS FIELD NAME DESCRIPTION TYPE RESET 7:00 SCRATCH Scratch data. RW 0x00 9.1.
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TUSB1210 www.ti.com SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 9.1.26 VENDOR_SPECIFIC1 ADDRESS OFFSET 0x3D PHYSICAL ADDRESS 0x3D DESCRIPTION Power Control register . TYPE RW INSTANCE USB_SCUSB BITS FIELD NAME 2 1 0 ABNORMALSTRESS_EN ID_FLOAT_EN 3 SPARE MNTR_VUSBIN_OK_EN 4 BVALID_RISE 5 BVALID_FALL 6 ID_RES_EN 7 SPARE WRITE LATENCY TYPE RESET RW 0 MNTR_VUSBIN_OK_EN When set to 1, it enables RX CMDs for high to low or low to high transitions on MNTR_VUSBIN_OK.
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TUSB1210 BITS 4 3 ID_FLOAT_EN ID_RES_EN BVALID_FALL FIELD NAME 2 1 0 ABNORMALSTRESS_EN 5 SPARE 6 BVALID_RISE 7 MNTR_VUSBIN_OK_EN www.ti.com SPARE SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 TYPE RESET 7 SPARE DESCRIPTION RW 0 6 MNTR_VUSBIN_OK_EN RW 0 5 ID_FLOAT_EN RW 0 4 ID_RES_EN RW 0 3 BVALID_FALL RW 0 2 BVALID_RISE RW 0 1 SPARE RW 0 0 ABNORMALSTRESS_EN RW 0 9.1.
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TUSB1210 www.ti.com SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 9.1.29 VENDOR_SPECIFIC2 ADDRESS OFFSET 0x80 PHYSICAL ADDRESS 0x80 DESCRIPTION Eye diagram programmability and DP/DM swap control .
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 www.ti.com 9.1.30 VENDOR_SPECIFIC2_SET ADDRESS OFFSET 0x81 PHYSICAL ADDRESS 0x81 DESCRIPTION This register doesn't physically exist. INSTANCE USB_SCUSB It is the same as the VENDOR_SPECIFIC1 register with read/set-only property (write '1' to set a particular bit, a write '0' has no-action).
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TUSB1210 www.ti.com SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 9.1.32 VENDOR_SPECIFIC1_STS ADDRESS OFFSET 0x83 PHYSICAL ADDRESS 0x83 DESCRIPTION Indicates the current value of the interrupt source signal.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 BITS FIELD NAME 7 Reserved 6 MNTR_VUSBIN_OK_LATCH 5 www.ti.com DESCRIPTION TYPE RESET R 0 Set to 1 when an unmasked event occurs on MNTR_VUSBIN_OK_LATCH. Clear on read register. R 0 ABNORMALSTRESS_LATCH Set to 1 when an unmasked event occurs on ABNORMALSTRESS. Clear on read register. R 0 4 ID_FLOAT_LATCH Set to 1 when an unmasked event occurs on ID_FLOAT. Clear on read register.
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TUSB1210 www.ti.com 4 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 CPEN_ODOS Mode selection bit for CPEN pin. RW 0 0 : CPEN pad is in CMOS mode 1: CPEN pad is in OD (Open Drain) or OS (Open Source) mode (controlled by CPEN_OD bit) 3 2:00 IDGND_DRV Drives ID pin to ground RW 0x0 VUSB3V3_VSEL 000 VRUSB3P1V = 2.5 V RW 0x3 001 VRUSB3P1V = 2.75 V 010 VRUSB3P1V = 3.0 V 011 VRUSB3P1V = 3.10 V (default) 100 VRUSB3P1V = 3.20 V 101 VRUSB3P1V = 3.30 V 110 VRUSB3P1V = 3.40 V 111 VRUSB3P1V = 3.50 V 9.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 52 www.ti.
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TUSB1210 www.ti.com 10 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 Application Information 10.1 Host or OTG, ULPI Input Clock Mode Application Figure 10-1 shows a suggested application diagram for TUSB1210 in the case of ULPI input-clock mode (60 MHz ULPI clock is provided by link processor), in Host or OTG application. Note this is just one example, it is of course possible to operate as HOST or OTG while also in ULPI output-clock mode.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 www.ti.com 14 (See Note A) 11 17 12 CFG CS CPEN VDD15 22 3.1–5.5 V 21 VBUS DATA6 10 DATA5 9 DATA4 7 DATA3 6 DATA2 5 DATA1 4 DATA0 3 VDD33 CVDD33 23 DIR 31 1 26 VDDIO VDD18 28, 30 ID 19 DM N/C DP 18 DP N/C N/C N/C GND GND B. C. D. E. 2 32 SHIELD A.
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TUSB1210 www.ti.com 11 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 Glossary CMOS Complimentary Metal Oxide Semiconductor DM Data manual DSP Digital signal processor ESD Electrostatic discharge ESR Equivalent series resistance hiZ High-impedance HS High speed HW Hardware IC Integrated circuit ID Identification IDDQ Direct drain quiescent current IF Interface IO or I/O Input/output JTAG Joint test action group, ieee 1149.
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TUSB1210 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 www.ti.
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TUSB1210 www.ti.com 12 SLLSE09F – NOVEMBER 2009 – REVISED AUGUST 2012 TUSB1210 Package 12.1 TUSB1210 Standard Package Symbolization TUSB1210BRHB Pin 1 Indicator YMLLLLS $ Figure 12-1. Printed Device Reference Table 12-1. TUSB1210 Nomenclature Description FIELDS MEANING P Marking used to note prototype (X), preproduction (P), or qualified/production device (Blank)(1) A Mask set version descriptor (initial silicon = BLANK, first silicon revision = A, second silicon revision = B,...
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 27-Jul-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TUSB1210BRHBR VQFN RHB 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 TUSB1210BRHBT VQFN RHB 32 250 180.0 12.4 5.3 5.3 1.5 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 27-Jul-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TUSB1210BRHBR VQFN RHB 32 3000 367.0 367.0 35.0 TUSB1210BRHBT VQFN RHB 32 250 210.0 185.0 35.
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