TUSB8040 USB 3.0 Four Port Hub Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Not Recommended for New Designs TUSB8040 www.ti.com SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 Contents 1 PRODUCT OVERVIEW 1.1 1.2 1.3 2 3 4 5 6 2 ......................................................................................................... 5 Features ...................................................................................................................... 5 Introduction ...............................................................................................
Not Recommended for New Designs TUSB8040 www.ti.com SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 List of Figures 1-1 Typical Application ................................................................................................................. 6 1-2 TUSB8040PFP Functional Block Diagram ..................................................................................... 7 4-1 TUSB8040 Clock ...............................................................................................
Not Recommended for New Designs TUSB8040 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 www.ti.com List of Tables 2-1 Clock and Reset Signals .......................................................................................................... 9 2-2 USB Upstream Signals............................................................................................................ 9 2-3 USB Downstream Signals .....................................................................................
Not Recommended for New Designs TUSB8040 www.ti.com SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 USB 3.0 Four Port Hub Check for Samples: TUSB8040 1 PRODUCT OVERVIEW 1.1 Features • USB 3.0 Compliant Four Port Hub, TID# 330000003 – Upstream Port Supports SuperSpeed, High-Speed and Full-Speed Connections – Each of the Four Downstream Ports Support SuperSpeed, High-Speed, Full-Speed/Low-Speed Connections • USB 2.
Not Recommended for New Designs TUSB8040 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 1.2 www.ti.com Introduction The TUSB8040 is USB 3.0 compliant hub available in an 80-pin QFP package. The device is designed for operation over the commercial temperature range of 0°C to 70°C. The TUSB8040 provides simultaneous SuperSpeed and high-speed/full-speed connections on the upstream port and provides SuperSpeed, high-speed, full-speed, or low-speed connections on the downstream ports.
Not Recommended for New Designs TUSB8040 www.ti.com 1.3 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 Functional Block Diagram The TUSB8040PFP (QFP) is a reduced footprint hub that supports ganged power switching and overcurrent protection only. A ganged hub switches on power to all its downstream ports when power is required to be on for any port. The power to the downstream ports is not switched off unless all ports are in a state that allows power to be removed.
Not Recommended for New Designs TUSB8040 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 2 www.ti.
Not Recommended for New Designs TUSB8040 www.ti.com 2.1 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 Clock and Reset Signals Table 2-1. Clock and Reset Signals SIGNAL NAME 2.2 TYPE PIN NO. DESCRIPTION GRSTz I, PU 33 Global power reset. This reset brings all of the TUSB8040 internal registers to their default states. When GRSTz is asserted, the device is completely nonfunctional. GRSTz should be asserted a minimum of 3 ms after all power rails are valid at the device.
Not Recommended for New Designs TUSB8040 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 2.3 www.ti.com USB Downstream Signals Table 2-3. USB Downstream Signals SIGNAL NAME TYPE PIN NO.
Not Recommended for New Designs TUSB8040 www.ti.com 2.4 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 I2C/SMBUS Signals Table 2-4. I2C/SMBUS Signals SIGNAL NAME TYPE PIN NO. DESCRIPTION I2C clock/SMBus clock. Function of terminal depends on the setting of the SMBUSz input. SCL/SMBCLK I/O, PD When SMBUSz = 1, this terminal acts as the serial clock interface for an I2C EEPROM. 34 When SMBUSz = 0, this terminal acts as the serial clock interface for an SMBus host.
Not Recommended for New Designs TUSB8040 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 www.ti.com Table 2-5. Test and Miscellaneous Signals (continued) SIGNAL NAME TYPE PIN NO. DESCRIPTION Full power management enable/SMBus address bit 1.
Not Recommended for New Designs TUSB8040 www.ti.com 3 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 FUNCTIONAL DESCRIPTION Table 3-1. TUSB8040 Register Map 3.
Not Recommended for New Designs TUSB8040 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 www.ti.com For details on SMBus requirements refer to the System Management Bus Specification. 3.3 Configuration Registers The internal configuration registers are accessed on byte boundaries. The configuration register values are loaded with defaults but can be over-written when the TUSB8040 is in I2C or SMBus mode. 3.3.1 ROM Signature Register Table 3-2. Register Offset 0h BIT NO.
Not Recommended for New Designs TUSB8040 www.ti.com 3.3.4 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 Product ID LSB Register Table 3-8. Register Offset 3h BIT NO. 7 6 5 4 3 2 1 0 RESET STATE 0 0 0 0 0 1 0 0 Table 3-9. Bit Descriptions – Product ID MSB Register BIT FIELD NAME 7:0 3.3.5 productIdLsb ACCESS DESCRIPTION RW Product ID LSB.
Not Recommended for New Designs TUSB8040 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 www.ti.com Table 3-13. Bit Descriptions – Device Configuration Register (continued) BIT FIELD NAME 5 ACCESS DESCRIPTION RW U1 U2 Disable When this bit is set, the TUSB8040 will not initiate or accept any U1 or U2 requests on any port, upstream or downstream, unless it receives or sends a Force_LinkPM_Accept LMP command.
Not Recommended for New Designs TUSB8040 www.ti.com 3.3.8 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 Device Removable Configuration Register Table 3-16. Register Offset 7h BIT NO. 7 6 5 4 3 2 1 0 RESET STATE 0 0 0 0 0 0 0 0 Table 3-17. Bit Descriptions – Device Removable Configuration Register BIT FIELD NAME ACCESS 7:4 RSVD RO Reserved. Read only, returns 0 when read. RW Removable.
Not Recommended for New Designs TUSB8040 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 www.ti.com 3.3.10 Language ID LSB Register Table 3-20. Register Offset 20h BIT NO. 7 6 5 4 3 2 1 0 RESET STATE 0 0 0 0 1 0 0 1 Table 3-21. Bit Descriptions – Language ID LSB Register BIT FIELD NAME 7:0 ACCESS langIdLsb RW DESCRIPTION Language ID least significant byte. This register contains the value returned in the LSB of the LANGID code in string index 0.
Not Recommended for New Designs TUSB8040 www.ti.com SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 3.3.13 Manufacturer String Length Register Table 3-26. Register Offset 23h BIT NO. 7 6 5 4 3 2 1 0 RESET STATE 0 0 0 0 0 0 0 0 Table 3-27. Bit Descriptions – Manufacturer String Length Register BIT FIELD NAME ACCESS 7 RSVD RO Reserved. Read only, returns 0 when read. RW Manufacturer string length. The string length in bytes for the manufacturer string.
Not Recommended for New Designs TUSB8040 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 www.ti.com 3.3.16 Manufacturer String Registers Table 3-32. Register Offset 50h-8Fh BIT NO. 7 6 5 4 3 2 1 0 RESET STATE 0 0 0 0 0 0 0 0 Table 3-33. Bit Descriptions – Manufacturer String Register BIT FIELD NAME 7:0 ACCESS mfgStringByte[n] DESCRIPTION Manufacturer string byte N. These registers provide the string values returned for string index 3 when mfgStringLen is greater than 0.
Not Recommended for New Designs TUSB8040 www.ti.com 4 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 CLOCK GENERATION The TUSB8040 accepts a crystal input to drive an internal oscillator or an external clock source. If a clock is provided to XI instead of a crystal, XO is left open and VSSOSC should be connected to the PCB ground plane. Otherwise, if a crystal is used, the connection needs to follow the guidelines below.
Not Recommended for New Designs TUSB8040 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 5 www.ti.com POWER UP AND RESET The TUSB8040 does not have specific power sequencing requirements with respect to the core power (VDD11) or I/O and analog power (VDD33). The core power (VDD11) or I/O power (VDD33) may be powered up for an indefinite period of time while the other is not powered up if all of these constraints are met: • All maximum ratings and recommended operating conditions are observed.
Not Recommended for New Designs TUSB8040 www.ti.com SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 6 ELECTRICAL SPECIFICATIONS 6.1 ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VALUE VDD33 -0.3 to 3.8 Steady-state supply voltage VDD11 VIO USB 2.0 DP/DM -0.3 to VDD33 + 0.3 ≤ 3.8 SuperSpeed USB TXP/M and RXP/M -0.3 to VDD33 + 0.3 ≤ 3.8 V -0.3 to 1.98 -0.3 to VDD33 + 0.3 ≤ 3.8 3.3-V Tolerant I/O VUSB_VBUS (1) V -0.3 to 1.
Not Recommended for New Designs TUSB8040 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 6.3 www.ti.com THERMAL INFORMATION TUSB8040 THERMAL METRIC PFP UNITS 80 PINS θJA Junction-to-ambient thermal resistance (1) 24.8 θJCtop Junction-to-case (top) thermal resistance (2) 21.5 (3) θJB Junction-to-board thermal resistance ψJT Junction-to-top characterization parameter (4) ψJB Junction-to-board characterization parameter (5) 8.2 (6) 1.
Not Recommended for New Designs TUSB8040 www.ti.com 6.4 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 3.3-V I/O ELECTRICAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER VIH High-level input voltage OPERATION (1) VIL Low-level input voltage (1) VI Input voltage TEST CONDITIONS VDD33 VDD33 JTAG pins only (2) MIN MAX UNIT 2 VDD33 V 0 0.8 0 0.55 0 VDD33 0 VDD33 V 0 25 ns 0.
Not Recommended for New Designs TUSB8040 SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013 6.5 www.ti.com HUB INPUT SUPPLY CURRENT over operating free-air temperature range (unless otherwise noted) PARAMETER CONDITION 1.1 V VDD11 1.
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