Datasheet

TVP5147M1
SLES140G JULY 2005REVISED FEBRUARY 2012
www.ti.com
5.2 Designing With PowerPAD™ Devices
The TVP5147 device is housed in a high-performance, thermally enhanced, 80-terminal PowerPAD
package (TI package designator: 80PFP). Use of the PowerPAD package does not require special
considerations except to note that the thermal pad, which is an exposed die pad on the bottom of the
device, is a metallic thermal and electrical conductor. Therefore, if not implementing the PowerPAD PCB
features, the use of solder masks (or other assembly techniques) can be required to prevent any
inadvertent shorting by the exposed thermal pad of connection etches or vias under the package. The
recommended option, however, is not to run any etches or signal vias under the device, but to have only a
grounded thermal land as in the following explanation. Although the actual size of the exposed die pad
may vary, the minimum size required for the keep-out area for the 80-terminal PFP PowerPAD package is
8 mm × 8 mm.
It is recommended that there be a thermal land, which is an area of solder-tinned-copper, under the
PowerPAD package. The thermal land varies in size, depending on the PowerPAD package being used,
the PCB construction, and the amount of heat that needs to be removed. In addition, the thermal land may
or may not contain numerous thermal vias, depending on PCB construction.
Other requirements for using thermal lands and thermal vias are detailed in the TI application report
PowerPAD™ Thermally Enhanced Package (SLMA002), available via the TI web site at http://www.ti.com.
For the TVP5147 device, this thermal land must be grounded to the low-impedance ground plane of the
device. This improves not only thermal performance but also the electrical grounding of the device. It is
also recommended that the device ground terminal landing pads be connected directly to the grounded
thermal land. The land size must be as large as possible without shorting device signal terminals. The
thermal land can be soldered to the exposed thermal pad using standard reflow soldering techniques.
While the thermal land can be electrically floated and configured to remove heat to an external heat sink, it
is recommended that the thermal land be connected to the low-impedance ground plane for the device.
More information can be obtained from the TI application report PHY Layout (SLLA020).
102 Application Information Copyright © 2005–2012, Texas Instruments Incorporated
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