Datasheet
TVP5147M1
74
XTAL1
14.31818-MHz
Crystal
75
XTAL2
TVP5147M1
74
XTAL1
75
XTAL2
C
L1
C
L2
14.31818-MHz
1.8-V Clock
NC
R
TVP5147M1
www.ti.com
SLES140G –JULY 2005–REVISED FEBRUARY 2012
2.3 Clock Circuits
An internal line-locked PLL generates the system and pixel clocks. A 14.318-MHz clock is required to
drive the PLL. This can be input to the TVP5147M1 decoder at the 1.8-V level on terminal 74 (XTAL1), or
a crystal of 14.318-MHz fundamental resonant frequency can be connected across terminals 74 and 75
(XTAL2). If a parallel resonant circuit is used as shown in Figure 2-10, then the external capacitors must
have the following relationship:
C
L1
= C
L2
= 2CL − C
STRAY
(1)
Where,
C
STRAY
is the terminal capacitance with respect to ground
C
L
is the crystal load capacitance specified by the crystal manufacturer
Figure 2-10 shows the reference clock configurations. The TVP5147M1 decoder generates the DATACLK
signal used for clocking data.
NOTE: The resistor (R) in parallel with the crystal is recommended to support a wide range of crystal types. A 100-kΩ resistor
may be used for most crystal types.
Figure 2-10. Reference Clock Configurations
2.4 Real-Time Control (RTC)
Although the TVP5147M1 decoder is a line-locked system, the color burst information is used to
determine accurately the color subcarrier frequency and phase. This ensures proper operation with
nonstandard video signals that do not follow exactly the required frequency multiple between color
subcarrier frequency and video line frequency. The frequency control word of the internal color subcarrier
PLL and the subcarrier reset bit are transmitted via terminal 37 (GLCO) for optional use in an end system
(for example, by a video encoder). The frequency control word is a 23-bit binary number. The
instantaneous frequency of the color subcarrier can be calculated using the following equation:
F
PLL
= (F
ctrl
/ 2
23
) × F
sclk
(2)
Where,
F
PLL
is the frequency of the subcarrier PLL
F
ctrl
is the 23-bit PLL frequency control word
F
sclk
is two times the pixel frequency
This information can be generated on the GLCO terminal. Figure 2-11 shows the detailed timing diagram.
Copyright © 2005–2012, Texas Instruments Incorporated Functional Description 23
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