Datasheet

TVP5147M1
SLES140G JULY 2005REVISED FEBRUARY 2012
www.ti.com
List of Figures
1-1 Functional Block Diagram....................................................................................................... 13
1-2 Terminal Assignments Diagram ................................................................................................ 13
2-1 Analog Processors and A/D Converters ...................................................................................... 16
2-2 Digital Video Processing Block Diagram ...................................................................................... 18
2-3 Composite and S-Video Processing Block Diagram......................................................................... 19
2-8 Luminance Edge-Enhancer Peaking Block Diagram ........................................................................ 22
2-9 Peaking Filter Response, NTSC/PAL ITU-R BT.601 Sampling ............................................................ 22
2-10 Reference Clock Configurations................................................................................................ 23
2-11 RTC Timing ....................................................................................................................... 24
2-12 Vertical Synchronization Signals for 525-Line System ...................................................................... 27
2-13 Vertical Synchronization Signals for 625-Line System ...................................................................... 28
2-14 Horizontal Synchronization Signals for 10-Bit 4:2:2 Mode.................................................................. 29
2-15 Horizontal Synchronization Signals for 20-Bit 4:2:2 Mode.................................................................. 30
2-16 VSYNC Position With Respect to HSYNC.................................................................................... 30
2-17 VBUS Access ..................................................................................................................... 33
2-18 Reset Timing...................................................................................................................... 36
2-19 Teletext Filter Function .......................................................................................................... 75
3-1 Clocks, Video Data, and Sync Timing ......................................................................................... 96
3-2 I
2
C Host Port Timing ............................................................................................................. 96
5-1 Example Application Circuit ................................................................................................... 101
4 List of Figures Copyright © 2005–2012, Texas Instruments Incorporated