Datasheet
TVP5147M1
SLES140G –JULY 2005–REVISED FEBRUARY 2012
www.ti.com
2-47 Output Formatter Control 2 Register .......................................................................................... 54
2-48 Output Formatter Control 3 Register .......................................................................................... 54
2-49 Output Formatter Control 4 Register .......................................................................................... 55
2-50 Output Formatter Control 5 Register .......................................................................................... 56
2-51 Output Formatter Control 6 Register .......................................................................................... 57
2-52 Clear Lost Lock Detect Register ............................................................................................... 57
2-53 Status 1 Register ................................................................................................................ 58
2-54 Status 2 Register ................................................................................................................ 59
2-55 AGC Gain Status Register ..................................................................................................... 59
2-56 Video Standard Status Register ............................................................................................... 60
2-57 GPIO Input 1 Register .......................................................................................................... 60
2-58 GPIO Input 2 Register .......................................................................................................... 61
2-59 AFE Coarse Gain for CH 1 Register .......................................................................................... 61
2-60 AFE Coarse Gain for CH 2 Register .......................................................................................... 62
2-61 AFE Coarse Gain for CH 3 Register .......................................................................................... 62
2-62 AFE Coarse Gain for CH 4 Register .......................................................................................... 63
2-63 AFE Fine Gain for Pb Register ................................................................................................ 63
2-64 AFE Fine Gain for Y_Chroma Register ....................................................................................... 64
2-65 AFE Fine Gain for Pr Register ................................................................................................. 64
2-66 AFE Fine Gain for CVBS_Luma Register .................................................................................... 64
2-67 Field ID Control Register ....................................................................................................... 65
2-68 F-Bit and V-Bit Decode Control 1 Register ................................................................................... 66
2-69 Back-End AGC Control Register .............................................................................................. 67
2-70 AGC Decrement Speed Register .............................................................................................. 67
2-71 ROM Version Register .......................................................................................................... 67
2-72 RAM Version MSB Register .................................................................................................... 67
2-73 AGC White Peak Processing Register ....................................................................................... 68
2-74 F-Bit and V-Bit Control 2 Register ............................................................................................. 69
2-75 VCR Trick Mode Control Register ............................................................................................. 69
2-76 Horizontal Shake Increment Register ......................................................................................... 70
2-77 AGC Increment Speed Register ............................................................................................... 70
2-78 AGC Increment Delay Register ................................................................................................ 70
2-79 Analog Output Control 1 Register ............................................................................................. 70
2-80 Chip ID MSB Register .......................................................................................................... 71
2-81 Chip ID LSB Register ........................................................................................................... 71
2-82 RAM Version LSB Register .................................................................................................... 71
2-83 Color PLL Speed Control Register ............................................................................................ 71
2-84 Status Request Register ........................................................................................................ 71
2-85 Vertical Line Count Register ................................................................................................... 72
2-86 AGC Decrement Delay Register ............................................................................................... 72
2-87 VDP TTX Filter and Mask Register ........................................................................................... 73
2-88 VDP TTX Filter Control Register .............................................................................................. 74
2-89 VDP FIFO Word Count Register .............................................................................................. 75
2-90 VDP FIFO Interrupt Threshold Register ...................................................................................... 76
2-91 VDP FIFO Reset Register ...................................................................................................... 76
2-92 VDP FIFO Output Control Register ........................................................................................... 76
2-93 VDP Line Number Interrupt Register ......................................................................................... 76
2-94 VDP Pixel Alignment Register ................................................................................................. 77
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