Datasheet

TVP5147M1
SLES140G JULY 2005REVISED FEBRUARY 2012
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4 Example Register Settings
The following example register settings are provided only as a reference. These settings (given the
assumed input connector, video format, and output format) set the TVP5147M1 decoder and provide
video output. Example register settings for other features and the VBI data processor are not provided
here.
4.1 Example 1
4.1.1 Assumptions
Input connector: Composite (VI_1_A) (default)
Video format: NTSC (J, M), PAL (B, G, H, I, N) or SECAM (default)
Note: NTSC-443, PAL-Nc, PAL-M, and PAL-60 are masked from the autoswitch process by default. See
the autoswitch mask register at address 04h.
Output format: 10-bit ITU-R BT.656 with embedded syncs (default)
4.1.2 Recommended Settings
Recommended I
2
C writes: For the given assumptions, only one write is required. All other registers are set
up by default.
I
2
C register address 08h = Luminance processing control 3 register
I
2
C data 00h = Optimizes the trap filter selection for NTSC and PAL
I
2
C register address 0Eh = Chrominance processing control 2 register
I
2
C data 04h = Optimizes the chrominance filter selection for NTSC and PAL
I
2
C register address 34h = Output formatter 2 register
I
2
C data 11h = Enables YCbCr output and the clock output
Note: HS/CS, VS/VBLK, AVID, FID, and GLCO are logic inputs by default. See output formatter 3 and 4
registers at addresses 35h and 36h, respectively.
98 Example Register Settings Copyright © 2005–2012, Texas Instruments Incorporated
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