Datasheet
TVP5151
SLES241E–SEPTEMBER 2009–REVISED OCTOBER 2011
www.ti.com
3.21.23 Vertical Blanking Stop Register
Address 19h
Default 00h
7 6 5 4 3 2 1 0
Vertical blanking stop
Vertical blanking (VBLK) stop
0111 1111 = 127 lines after stop of vertical blanking interval
0000 0001 = 1 line after stop of vertical blanking interval
0000 0000 = Same time as stop of vertical blanking interval (default) (see Figure 3-5)
1111 1111 = 1 line before stop of vertical blanking interval
1000 0000 = 128 lines before stop of vertical blanking interval
Vertical blanking is adjustable with respect to the standard vertical blanking intervals. The setting in this
register determines the timing of the INTREQ/GPCL/VBLK signal when it is configured to output vertical
blank (see register 03h). The setting in this register also determines the duration of the luminance bypass
function (see register 07h).
3.21.24 Chrominance Control #1 Register
Address 1Ah
Default 0Ch
7 6 5 4 3 2 1 0
Reserved Color PLL reset Chrominance Chrominance Automatic color gain control
adaptive comb comb filter
filter enable enable (CE)
(ACE)
Color PLL reset
0 = Color PLL not reset (default)
1 = Color PLL reset
When a 1 is written to this bit, the color PLL phase is reset to zero and the subcarrier PLL phase reset
bit is transmitted on terminal 23 (GLCO) on the next line (NTSC or PAL).
Chrominance adaptive comb filter enable (ACE)
0 = Disable
1 = Enable (default)
Chrominance comb filter enable (CE)
0 = Disable
1 = Enable (default)
Automatic color gain control (ACGC)
00 = ACGC enabled (default)
01 = Reserved
10 = ACGC disabled
11 = ACGC frozen to the previously set value
44 Functional Description Copyright © 2009–2011, Texas Instruments Incorporated
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