TVP5154EVM User's Guide Literature Number: SLEU069A February 2006 – Revised July 2006
SLEU069A – February 2006 – Revised July 2006 Submit Documentation Feedback
Contents 1 Functional Description................................................................................................. 6 1.1 2 3 4 5 6 7 8 9 Board Level Description Test Points and Jumpers........................................................................................ 7 2.2 Common Board Interface 2.3 Video Input Description.......................................................................................... 8 2.4 Video Output Description ................................
List of Figures 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 4 TVP5154EVM Block Diagram .............................................................................................. 7 Anti-Aliasing Filter Selection................................................................................................ 8 TVP5154EVM System-Level Block Diagram ............................................................................. 9 WinVCC – I2C Configuration Screen ....................
List of Tables 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 I2C Address Selection Jumpers (I2CSEL1, JP9 and I2CSEL2, JP10)................................................ 7 Power-Down-Mode Selection Jumper (PDN, JP11) .................................................................... 7 Main Menu Summary ...................................................................................................... 16 TVP5154 Register Map Editor Controls ....................................................
User's Guide SLEU069A – February 2006 – Revised July 2006 TVP5154EVM User's Guide 1 Functional Description The TVP5154EVM evaluation module is a printed circuit board designed for evaluation of the TVP5154 quad video decoder. The board includes the TMS320DM642 digital signal processor (DSP) and is designed with a 120-pin connector, which allows a connection to multiple backends; the evaluation module (EVM) is shipped with a professional encoder module.
www.ti.com Board Level Description 2 Board Level Description The TVP5154EVM consists of the TVP5154EVM module and the encoder EVM module. A 4-row 120-pin connector connects the boards. The block diagram of the EVM set is shown in Figure 1. Figure 1. TVP5154EVM Block Diagram 2.1 Test Points and Jumpers The TVP5154EVM was designed with test points and jumpers to help in evaluation and troubleshooting. Each jumper is set by default in its preferred state for the TVP5154EVM.
www.ti.com Board Level Description Note: 2.2 If the I2C address is changed on either the TVP5154 board or the encoder board while the TVP5154EVM is powered up, that device will not recognize the new I2C address. The reset button on the TVP5154EVM must be pressed and WinVCC must be reconfigured for the new I2C address. Common Board Interface The TVP5154EVM uses a 4-row 120-pin connector to share common signals and the 5-V power supply between the boards.
www.ti.com System-Level Description 3 System-Level Description A system-level block diagram incorporating the TVP5154 is shown in Figure 3. Typical commercially-available test equipment is also shown. The primary features of this configuration are: • Power is provided by a single 5-V power supply provided with the EVM and is shared between both modules via the 120-pin connector. • Supported analog inputs include composite video and S-video.
www.ti.com Software Installation The system comes with the anti-alias filters bypassed. To connect the filters, you must rotate the appropriate jumpers (JP1–JP8) as described in section 2.3. The I2C slave address can be selected with jumpers JP9 and JP10. There are four possible addresses: B8, BA, BC, and BE. The default setting for these jumpers is for the shunt to short pins 2-3, which selects 0xB8. These are connected to pins 117 and 118, which are read at power up.
www.ti.com WinVCC Quick Start Figure 4. WinVCC – I2C Configuration Screen 3. Ensure that all other boxes are selected as “Not Used” and that all program options buttons are set to ENABLE. Click OK. 4. If there are no I2C communication issues, the Real-Time Polling dialog window displays next as shown in Figure 5. If there are I2C issues, an I2C Test Report box displays.
www.ti.com WinVCC Quick Start Figure 5. Real-Time Polling Dialog 6. The TVP5154 I2C Write Enable(s) and Read Enable pop-up window is displayed as shown in Figure 6. This is used to select which decoder or decoders (any combination of all four) will receive I2C Write commands, and which decoder (only one) will receive I2C Read commands. Decoder 1 is Enabled by default; enable the other three decoders by clicking on each decoder’s enable button. Figure 6. Decoder I2C Write and Read Enable 7.
www.ti.com WinVCC in Depth Figure 8. WinVCC – System Initialization 9. With video sources provided at the BNC connectors and the EVM output connected to a monitor, video from the source connected to CH1 should be viewable on the display monitor. 10. The other datasets in the command file are provided to demonstrate examples of 5154 scaling performance. Refer to the TVP5154 data sheet (SLES163) or Scaler application report for more details on programming the TVP5154 scaler.
www.ti.com WinVCC in Depth 8.2 WinVCC Configuration Dialog Box The WinVCC Configuration dialog box (see Figure 10) should now be visible. This dialog box configures the I2C bus on the TVP5154EVM. All settings from this dialog box are stored in the Windows registry and are restored the next time the program is started. After initial installation, VID_DEC is set to TVP5154 and VID_ENC is set to 7311 Encoder.
www.ti.com WinVCC in Depth 2 2 The I C system test can be run at anytime by clicking Run System I C Test in the Tools menu. Figure 11. I2C System Failure 8.4 Real-Time Polling Real-time polling provides polling functions that execute continuously in the background, when enabled via the Real-Time Polling dialog. There are two polling functions. The function that applies to the TVP5154 is VIDEO-STANDARD AUTO-SWITCH POLLING.
www.ti.com WinVCC in Depth Figure 12. Real-Time Polling Dialog 8.5 Main Menu After closing the real-time polling dialog, the main menu is displayed as shown in Figure 13. The menus, which are used to operate WinVCC, are File, Edit, Tools, Window, and Help. The File menu’s only function is Exit, which terminates the program. Table 3 summarizes the main menu contents. Figure 13. WinVCC – Main Screen Table 3.
www.ti.com WinVCC in Depth 2 The TVP5154 I C Write Enable(s) and Read Enable pop-up window is displayed as shown in Figure 14. This is used to select which decoder or decoders (any combination of all four) will receive I2C Write commands, and which decoder (only one) will receive I2C Read commands. Decoder 1 is Enabled by default; enable the other three decoders by clicking on each decoder’s enable button. Figure 14. Decoder I2C Write and Read Enable 8.5.
www.ti.com WinVCC in Depth Figure 15. System Initialization 8.5.1.1 Adding a Custom Dataset After programming the EVM via the System Initialization tool using the factory-supplied command file, you can customize the device register settings to fit your needs. Perform the following steps to save your custom settings: 1. Reopen the System Initialization dialog box via the Tools menu. 2. Click the Append Current Device Settings to Command File button.
www.ti.com WinVCC in Depth 8.5.1.2 Command Files The command file is a text file that can be generated using any common editor; however, it must be saved as plain text. Command files are especially useful for quickly switching between the various system configurations. These .CMD files are unrelated to the typical Windows .CMD files. A default command file is provided on the CD. This command file contains many examples of the desired setups.
www.ti.com WinVCC in Depth If the literal slave address method is used, the slave address entered is used directly. This method is normally used for programming the video encoder. The slave address 0x40h is used to access the DM642. • A delay may be inserted between commands using the WAIT command, which is written as: WAIT,<# milliseconds> 8.5.
www.ti.com WinVCC in Depth Table 4. TVP5154 Register Map Editor Controls CONTROL DEFINITION Register Window Scrolling text box that displays the address and data for the I2C registers that are defined for the device Address Edit Box Contains the I2C subaddress that will be accessed using the Write and Read buttons. Clicking on a row selects an address, which then appears in the address edit box. NOTE: After clicking on a row, the Data Edit box contains the data that was in the register window.
www.ti.com WinVCC in Depth The DM642 I2C registers can be edited using I2C sub-address 0x40. See Section 9 for details about the DM642 registers. The video encoder module registers can be edited using I2C sub-address 0x54 (default) or 0x56 if the alternate slave address is being used. Figure 18. Generic I2C Register Map Editor 8.5.2.
www.ti.com WinVCC in Depth Table 5. Memory Map Editor Controls CONTROL DEFINITION Base Address Selector The hardware registers use a 10-bit address internally. The base address selector allows quick entry of the base address. The list contains base addresses for the major functional blocks of the TVP5154. Address Offset Edit Box Contains the lowest byte of the 10-bit internal address. The full 10-bit address is formed by adding the base address to the address offset.
www.ti.com WinVCC in Depth Figure 20. TVP5154 Property Sheets 8.6.1 Property Sheet Refresh The property sheets are designed so that the data displayed is always current. Certain actions cause the entire register map to be read from the device and to update the property sheets. This happens when: • Property sheets are initially opened. • When tabbing from one page to another. • When Read All is clicked. • When making the TVP5154 Property Sheets window the active window (by clicking on it).
www.ti.com Programming the TMS320DM642 Table 6.
www.ti.com Programming the TMS320DM642 9.2 Details of the DM642 Code and Control Registers Details of the DM642 code and control registers are: • The DM642 device address is 0x40h by default. The DM642 is setup as an I2C slave. • The DM642 executes code on power up from the flash using the PCI GPIO to control the address MSB. • Virtual I2C registers are created within the DM642 in order to control the capture and display of the scaled/unscaled data from the TVP5154 video decoder.
www.ti.com Programming the TMS320DM642 When the DM642 Control window is opened, all readable registers for the device are read from software to initialize the dialog page. Register details are given in Table 8. Values on the page are changed by manipulating the various dialog controls as described in Table 8. The data is organized for each of the four decoders, allowing independent control of each decoder. Table 8. DM642 Control Window Controls CONTROL 9.2.
www.ti.com Programming the TMS320DM642 9.2.3 DM642 Virtual I2C Register Details Table 10.
www.ti.com Programming the TMS320DM642 Note: The unscaled Decoder 2 displays in both Quadrant 2 and 3 since Decoder 2 takes priority over Decoder 3 when both are unscaled. Table 11.
www.ti.com Programming the TMS320DM642 Table 12.
www.ti.com Programming the TMS320DM642 Capture Enable Bit 3 Disable (default) 0 Enable 1 Position Bit 5 Bit 4 Quadrant 1 0 0 Quadrant 2 0 1 Quadrant 3 1 0 Quadrant 4 (default) 1 1 Quad 1 Quad 2 Quad 3 Quad 4 Table 14. Decoder 1 Input Format Register Address 04h Default 01h 7 6 5 4 3 2 Reserved Input Color Standard Bit 2 Bit 1 Bit 0 NTSC 0 0 0 (B, D, G, H, I, N) PAL (default) 0 0 1 Reserved 1 0 Input Color Standard ...
www.ti.com Programming the TMS320DM642 Table 16. Decoder 3 Input Format Register Address 06h Default 01h 7 6 5 4 3 2 Reserved Input Color Standard Bit 2 Bit 1 Bit 0 NTSC 0 0 0 (B, D, G, H, I, N) PAL (default) 0 0 1 Reserved 1 0 Input Color Standard ... Table 17.
www.ti.com Troubleshooting 10 Troubleshooting This chapter discusses ways to troubleshoot the TVP5154EVM. 10.1 Troubleshooting Guide If you are experiencing problems with the TVP5154EVM hardware or the WinVCC software, see Table 21 for available solutions. Table 21. TVP5154EVM Troubleshooting SYMPTOM At startup, the error message Cannot find DLL file DLPORTIO.DLL appears. Blank screen CAUSE The parallel port driver supplied with the EVM has not been installed. Run Port95NT.
www.ti.com Troubleshooting Table 21. TVP5154EVM Troubleshooting (continued) SYMPTOM CAUSE SOLUTION Make sure I2C slave address jumpers on the TVP5154 decoder module are across pins 2 and 3. Decoder I2C slave address is wrong. Encoder I2C Slave address is hard coded to be 0x54 in the command file. Make sure the I2C slave address jumper on encoder module is across pins 2 and 3. slave address is wrong. Parallel cable is not connected from PC parallel port to the TVP5154 decoder module DB25 connector.
www.ti.com Troubleshooting Figure 22. I2C System Failure Dialog Box 10.2 Corrective Action Dialogs After closing the I2C system test report dialog box, a dialog box (see Figure 23) appears. Figure 23. Corrective Action Dialog Box 1. If the parallel port cable is NOT connected between to PC and the TVP5154EVM, or if the EVM power is not on: a. Click NO. b. The dialog box shown in Figure 23 appears instructing you to correct the problem. c. Correct the problem. d. Click OK to continue.
www.ti.com Troubleshooting Figure 24. Corrective Action Required 2. If the cable is connected from the PC parallel port to the TVP5154EVM and the EVM power is on: a. Click Yes. b. The dialog box shown in Figure 24 appears. This dialog box appears if the PC parallel port mode setting may need to be changed. Note: c. d. e. f.
www.ti.com TVP5154EVM Schematics 10.2.2 2 General I C Error Report The I2C Error Report shown in Figure 26 appears when an I2C error occurs at any time other than after the I2C system test. In this example, there is acknowledge error at slave address 0x54 (the video encoder module). The error occurred on Read Cycle Phase 1 on the device (slave) address byte. Figure 26.
1 2 3 4 5 6 D D TVP5154EVMDVB REV 1.2 I2C page 17 - I2C Power page 7 - Power SDA SCL 4A_IN 4B_IN 4A_IN 4B_IN 1A_OUT 1B_OUT 1A_OUT 1B_OUT 2A_OUT 2B_OUT 2A_OUT 2B_OUT 3A_OUT 3B_OUT 3A_OUT 3B_OUT 4A_OUT 4B_OUT 4A_OUT 4B_OUT CH1_OUT[7..0] SCKS1 SCK1 HS1 VS1 AV1 FID1 VB1 CH1_OUT[7..0] SCKS1 CH2_OUT[7..0] SCKS2 SCK2 HS2 VS2 AV2 FID2 VB2 CH2_OUT[7..0] SCKS2 CH3_OUT[7..0] SCKS3 SCK3 HS3 VS3 AV3 FID3 VB3 CH3_OUT[7..0] SCKS3 CH4_OUT[7..0] SCKS4 SCK4 HS4 VS4 AV4 FID4 VB4 CH4_OUT[7..
1 2 3 4 5 6 D D DM642 Clocks and Reset page 6 - DM642 Clocks and Reset /RESET SCL SDA DM642 Power Pins page 9 - DM642 Power Pins /RESET SCL SDA DM642 Video Ports page 5 - DM642 Video Ports C CH1_OUT[7..0] SCKS1 AV1 CH1_OUT[7..0] SCKS1 AV1 CH2_OUT[7..0] SCKS2 AV2 CH2_OUT[7..0] SCKS2 AV2 CH3_OUT[7..0] SCKS3 AV3 CH3_OUT[7..0] SCKS3 AV3 CH4_OUT[7..0] SCKS4 AV4 CH4_OUT[7..0] SCKS4 AV4 C ENC_Y[7..0] ENC_C[7..0] ENC_Y[7..0] ENC_C[7..
1 2 3 4 5 6 D D U25B SCKS1 SCKS2 AV1 AV2 1 2 3 4 RPACK4-33 8 7 6 5 AF14 AF12 AE17 AC17 AD17 RN25 SCKS3 SCKS4 AV3 AV4 1 2 3 4 AF8 AF10 RPACK4-33 8 7 6 5 AF4 AE5 AD5 RN26 D3.
1 2 D3.3V 3 4 5 6 D3.3V L2 D3.3V R72 150 BLM21P221SN TP3 TP R75 150 D 2 R61 R74 150 2 33 3 K A C168 NO POP 50.00MHz 1 2 3 K A OUT R73 150 RN1 RPACK4-10k K A GND 4 2 VCC 1 2 EN K A 1 2 C166 1000pF 5 6 7 8 C3 0.
1 2 3 4 5 6 TED16 TED17 TED18 TED19 TED20 TED21 TED22 TED23 TED24 TED25 TED26 TED27 TED28 TED29 TED30 TED31 16 15 14 13 12 11 10 9 R17 NO POP R19 NO POP RN5 RPACK8-33 1 2 3 4 5 6 7 8 R18 NO POP EMIF_ECLKINSEL[1:0] TEA19 TEA20 TEA20 0 TEA19 0 MODE SELECTED ECLKIN( DEFAULT) 0 1 CPU CLOCK /4 EMIF CLOCK 1 0 CPU CLOCK /6 EMIF CLOCK 1 1 RESERVED D R20 NO POP F25 F24 E25 E24 D25 D26 C25 C26 1 2 3 4 5 6 7 8 RN4 RPACK8-33 H24 H23 G26 G23 G25 G24 F26 F23 1 2 3 4 5 6 7 8 D21 A21 C20
1 2 3 4 6 5 D3.
1 2 3 4 5 6 D D CORE CAPACITORS ARE 0402 SIZE A1 A3 A6 A8 A12 A14 A19 A22 A26 B3 B6 B7 B13 B19 C2 C4 C13 C18 C23 D1 D2 D5 D13 D18 D22 D24 E3 E6 E9 E16 E18 E21 E23 E26 F5 F8 F10 F11 F13 F14 F16 F17 F19 F22 G9 G12 G15 G18 H1 H6 H21 H26 J5 J7 J20 J22 K6 K21 L1 L6 L21 M7 M13 M15 M20 N5 N6 N12 N14 N21 N25 D3.3V DSP_CVDD 0.01uF C20 0.01uF C21 0.01uF C25 C29 0.01uF C32 0.
1 2 3 4 5 6 D D TED[31..0] TED[31..0] D3.3V C72 0.1uF U4 D3.3V R49 10k R50 10k R51 10k R52 10k GP13_A19 GP14_A20 GP15_A21 21 20 19 18 17 16 15 14 8 7 36 6 5 4 3 2 1 40 13 37 38 29 22 24 9 TCE1# TSDCAS# TSDWE# 10 D3.
1 2 3 4 5 6 D D 3.3V_SUPPLY D5V C74 0.1uF C75 0.1uF C76 0.1uF C77 0.1uF C78 0.1uF 1 1 1 TP TP22 TP TP TP21 TP TP TP20 TP TP TP19 TP 1 3.3V_SUPPLY U5 42 31 C SCK4 CH4_OUT[7..0] CH4_OUT[7..0] 47 CH4_OUT0 46 CH4_OUT1 44 CH4_OUT2 43 CH4_OUT3 41 CH4_OUT4 40 CH4_OUT5 38 CH4_OUT6 37 CH4_OUT7 36 35 33 32 30 29 27 26 3.
1 2 3 4 5 6 D D D5V H1 1 3 5 7 9 11 SCL SDA SCL SDA HEADER 6X2 /RESET CH1_OUT[7..0] 2 4 6 8 10 12 CH1_OUT[7..0] H2 CH1_OUT0 CH1_OUT1 CH1_OUT2 CH1_OUT3 CH1_OUT4 CH1_OUT5 CH1_OUT6 CH1_OUT7 SCKS1 SCK1 VB1 AV1 HS1 VS1 FID1 SCKS1 SCK1 VB1 AV1 HS1 VS1 FID1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 HEADER 16X2 C C CH2_OUT[7..0] CH2_OUT[7..
1 2 C81 0.1uF C83 0.1uF C85 0.1uF 5 6 IOVDD C86 0.1uF C88 0.1uF C90 0.1uF C92 0.1uF C94 0.1uF C96 0.1uF P1 SMA_PCB_MT_MOD R92 0 1 CH2_PLL_VDD CH3_PLL_VDD CH4_PLL_VDD C80 0.1uF C82 0.1uF C84 0.1uF C87 0.1uF DVDD C89 0.1uF C91 0.1uF C93 0.1uF C95 0.1uF R93 0 50 R101 5 4 3 2 CH1_PLL_VDD X2 C79 0.1uF 4 X1/OSC CH1_AVDD CH2_AVDD CH3_AVDD CH4_AVDD AVDD_REF 3 C97 0.1uF D R102 100k Y4 14.
1 2 3 4 5 6 NOTE: FILTERS DESIGNED FOR CVBS INPUTS (ADC SAMPLING RATE = 27MHz) D C202 8.2pF L4 2.2uH 1A_IN 1A_OUT C210 330pF C204 8.2pF L6 2.2uH C205 8.2pF L8 2.2uH B 8.2pF L9 2.2uH 8.2pF L7 2.2uH C213 330pF 2B_IN 2B_OUT C217 330pF C C2078.2pF L10 2.2uH 4A_IN 4A_OUT C220 330pF C222 330pF C209 C224 330pF B 8.2pF L11 2.2uH 3B_IN 3B_OUT C219 330pF C206 C216 330pF 3A_OUT C208 2.2uH D 2A_OUT C215 330pF 3A_IN C218 330pF L5 C212 330pF 1B_OUT C214 330pF 8.
1 2 3 4 5 6 D D D3.3V C106 C 0.1uF R83 2.2k C R84 2.2k TP23 TP P2 U2C 5 8 9 R94 SCL SCL 0 SN74AHC05DR DB15 SN74AHC05DR U2F 13 DB17 12 D3.3V SN74AHC05DR U2A 1 DB9 R88 2.2k 14 R87 2.2k 2 SN74AHC05DR TP24 TP 1 TP DB11 U2B 4 DB25F_182-25F-ND 26 U2D 6 7 1 14 2 15 3 16 4 17 5 18 6 19 7 20 8 21 9 22 10 23 11 24 12 25 13 1 27 TP 2.2k R82 R85 2.2k 0 3 SDA SDA R95 R86 2.2k SN74AHC05DR B B U2E 11 10 SN74AHC05DR TEXAS INSTRUMENTS, INC.
1 2 3 4 5 6 D3.3V C107 0.1uF C109 0.1uF C111 0.1uF C113 0.1uF C115 0.1uF C117 0.1uF C119 0.1uF C121 0.1uF C123 0.1uF C125 0.1uF C127 0.1uF C129 0.1uF C108 0.1uF C110 0.1uF C112 0.1uF C114 0.1uF C116 0.1uF C118 0.1uF C120 0.1uF C122 0.1uF C124 0.1uF C126 0.1uF C128 0.1uF C130 0.1uF D3.3V D TED[63..0] D TED[63..0] D3.3V D3.
1 2 3 4 5 6 D D ROUTE TRACES AS ONE GROUP. MATCH SIGNAL LENGTH. P3 C2 B3 C4 C5 B5 C6 B6 C7 C9 B9 C10 B10 C11 B11 C12 C13 B13 C14 XDS_EMU1 XDS_EMU0 B14 XDS_TCKRET C8 XDS_TCK B12 XDS_TDO B7 XDS_TDI B4 XDS_TMS B2 XDS_TRST# C3 C15 C1 B15 B1 1k B8 LOCATE R-PACK NEAR DSP D3.3V DSP_EMU[11..0] DSP_EMU[11..
1 2 3 4 5 6 7 8 RESET ON POWER UP POWER ON LED (+5V) 5V, 3.0A DC INPUT D3.3V D R103 D5V D5V F1 D 100k FUSE L12 C1330.1uF U11 R122 330 P4 PJ-002BH 2 D1 ZENER 3 2 1 LED1 GRN_LED + C227 47uF C228 22uF 1 2 3 4 S1 PB SS26 C190 1uF HEADER 3 8 7 6 5 CONTROL VDD /RESIN SENSE CT RESET GND /RESET /RESET /RESET TLC7733IPWR 1 K A H7 1 3 2 VOUT1 IS 3.3V 1A VOUT2 IS 1.8V 2A FB1 FERRITE R123 249k R96 R27 NO POP C231 22uF R124249k R126 L14 1.8V_SUPPLY EMI SUPPRESION.
1 2 3 4 5 6 D D D5V D5V D5V D5V P5 C SCL SDA 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 5V 5V GND GND GND SCL/PHI_ACK SDA/PHI_RWW PHI_DS/RD PHI_CS PHI_A1 PHI_A0 PHI_D7 PHI_D6 PHI_D5 PHI_D4 PHI_D3 PHI_D2 PHI_D1 PHI_D0 GND CLK5/M1 FPDAT/VSYA/M2 FFRSTW/CBFLAG FSY/HC/HSYA/~BLNK VGAV/SYNC_T FFIE/CCVALID FFWE/DVALID FFRSTWIN/~SCLK FFRE/DIG_H FFOE/DIG_V 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 5V 5V GND GND GND
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
