Datasheet

Y/C
Separation
3D/5-line
Adaptive
Comb
Filter
ADC1
M U X
CVBS/Y
C/CbCr
C Y
Output
Formatter
Y[9:0]
VBI
Data
Slicer
MacroVision
Copy
Protection
Detection
C[9:0]
Host
Interface
Timing Processor
With Sync Detector
Analog Out
CVBS/
Pr/C/R
CVBS/
Y/G
CVBS/
Pb/C/B
CVBS/Y
Analog Front End
Sampling Clock
GPIO
HS/CS
VS/VBLK
FID
AVID
XIN
XOUT
SCLK
RESETB
GLCO
PWDN
SCL
INTREQ
VI_1
CVBS/
Y/G
VI_2 VI_3 VI_4 VI_5 VI_6 VI_7 VI_8 VI_9
VI_10 VI_11 VI_12
Luma
Processing
3D Noise
Reduction
ADC2
Chroma
Processing
TBC/
IF Comp
DB
DG
DR
FSO
SDA
SDRAM
Interface
Data
Control
Address
C
Y
C
Y
C
Y
FSS
TVP5160
www.ti.com SLES135E–FEBRUARY 2005–REVISED APRIL 2011
1.8 Functional Block Diagram
Copyright © 2005–2011, Texas Instruments Incorporated Introduction 13
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