Datasheet
121
XIN
C
L1
C
L2
XOUT
122
R
TVP5160
121
XIN
XOUT
122
TVP5160
14.31818-MHz
1.8-V Clock
NC
14.31818-MHz
Crystal
33
2
= ×
CTRL
PLL SCLK
F
F F
TVP5160
SLES135E–FEBRUARY 2005–REVISED APRIL 2011
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2.3 Clock Circuits
An internal line-locked PLL generates the system and pixel clocks. A 14.31818-MHz clock is required to
drive the PLL. This may be input to the TVP5160 decoder at 1.8-V level on terminal 121 (XIN), or a crystal
of 14.31818-MHz fundamental resonant frequency may be connected across terminals 121 (XIN) and 122
(XOUT). If a parallel resonant circuit is used as shown in Figure 2-4, then the external capacitors must
have following relationship:
C
L1
= C
L2
= 2C
L
– C
STRAY
Where,
C
STRAY
is the pin capacitance with respect to ground
C
L
is the crystal load capacitance specified by the crystal manufacturer
Figure 2-4 shows the reference clock configurations. The TVP5160 decoder generates the SCLK signal
used for clocking data.
NOTE
See crystal data sheet for correct loading specifications.
Note: The resistor (R) in parallel with the crystal is recommended to support a wide range of crystal types. A 100-kΩ resistor
may be used for most crystal types.
Figure 2-4. Reference Clock Configuration
2.4 Real-Time Control (RTC)
Although the TVP5160 decoder is a line-locked system, the color burst information is used to accurately
determine the color subcarrier frequency and phase. This ensures proper operation with nonstandard
video signals that do not follow exactly the required frequency multiple between color subcarrier frequency
and video line frequency. The frequency control word of the internal color subcarrier PLL and the
subcarrier reset bit are transmitted via the terminal 83 (GLCO) for optional use in an end system (for
example, by a video encoder). The frequency control word is a 23-bit binary number. The instantaneous
frequency of the color subcarrier can be calculated from the following equation:
where F
PLL
is the frequency of the subcarrier PLL, F
CTRL
is the 23-bit PLL frequency control word and
F
SCLK
is the 2× pixel frequency.
22 Functional Description Copyright © 2005–2011, Texas Instruments Incorporated
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