Datasheet

TVP5160
www.ti.com SLES135E–FEBRUARY 2005–REVISED APRIL 2011
Table 3-1. I
2
C Registers Summary (continued)
REGISTER NAME I
2
C SUBADDRESS DEFAULT R/W
(1)
VDP TTX Filter 2 Mask 1 B6h 00h R/W
VDP TTX Filter 2 Mask 2 B7h 00h R/W
VDP TTX Filter 2 Mask 3 B8h 00h R/W
VDP TTX Filter 2 Mask 4 B9h 00h R/W W
VDP TTX Filter 2 Mask 5 BAh 00h R/W
VDP TTX Filter Control BBh 00h R/W
VDP FIFO Word Count BCh R
VDP FIFO Interrupt Threshold BDh 80h R/W
Reserved BEh
VDP FIFO Reset BFh 00h R/W
VDP FIFO Output Control C0h 00h R/W
VDP Line Number Interrupt C1h 00h R/W
VDP Pixel Alignment C2h–C3h 01Eh R/W
Reserved C4h–D5h
VDP Line Start D6h 06h R/W
VDP Line Stop D7h 1Bh R/W
VDP Global Line Mode D8h FFh R/W
VDP Full Field Enable D9h 00h R/W
VDP Full Field Mode DAh FFh R/W
Interlaced/Progressive Status DBh R
Reserved
(2)
DCh-DFh
VBUS Data Access with No VBUS Address Increment E0h R/W
VBUS Data Access with VBUS Address Increment E1h R/W
VDP FIFO Read Data E2h R
Reserved
(2)
E3h-E7h
VBUS Address Access E8h–EAh 00 0000h R/W
Reserved
(2)
EBh-EFh
Interrupt Raw Status 0 F0h R
Interrupt Raw Status 1 F1h R
Interrupt Status 0 F2h R
Interrupt Status 1 F3h R
Interrupt Mask 0 F4h 00h R/W
Interrupt Mask 1 F5h 00h R/W
Interrupt Clear 0 F6h 00h R/W
Interrupt Clear 1 F7h 00h R/W
Reserved
(2)
F8h-FFh
Copyright © 2005–2011, Texas Instruments Incorporated Internal Control Registers 41
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