Datasheet
TVP5160
SLES135E–FEBRUARY 2005–REVISED APRIL 2011
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Table 3-109. AGC Decrement Delay
Subaddress 9Eh
Default 1Eh
7 6 5 4 3 2 1 0
AGC decrement delay [7:0]
AGC decrement delay: Number of frames to delay gain decrements
1111 1111 = 255
0001 1110 = 30 (default)
0000 0000 = 0
Table 3-110. VDP TTX Filter and Mask
Subaddress B1h B2h B3h B4h B5h B6h B7h B8h B9h BAh
Default 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h
Subaddress 7 6 5 4 3 2 1 0
B1h Filter 1 Mask 1 Filter 1 Pattern 1
B2h Filter 1 Mask 2 Filter 1 Pattern 2
B3h Filter 1 Mask 3 Filter 1 Pattern 3
B4h Filter 1 Mask 4 Filter 1 Pattern 4
B5h Filter 1 Mask 5 Filter 1 Pattern 5
B6h Filter 2 Mask 1 Filter 2 Pattern 1
B7h Filter 2 Mask 2 Filter 2 Pattern 2
B8h Filter 2 Mask 3 Filter 2 Pattern 3
B9h Filter 2 Mask 4 Filter 2 Pattern 4
BAh Filter 2 Mask 5 Filter 2 Pattern 5
For an NABTS system, the packet prefix consists of five bytes. Each byte contains 4 data bits (D[3:0]) interlaced with 4 Hamming protection
bits (H[3:0]):
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
D[3] H[3] D[2] H[2] D[1] H[1] D[0] H[0]
Only the data portion D[3:0] from each byte is applied to a teletext filter function with corresponding pattern bits P[3:0] and mask bits M[3:0].
The filter ignores hamming protection bits.
For a WST system (PAL or NTSC), the packet prefix consists of two bytes. The two bytes contain three bits of magazine number (M[2:0])
and five bits of row address (R[4:0]), interlaced with eight Hamming protection bits H[7:0]:
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
R[0] H[3] M[2] H[2] M[1] H[1] M[0] H[0]
R[4] H[7] R[3] H[6] R[2] H[5] R[1] H[4]
The mask bits enable filtering using the corresponding bit in the pattern register. For example, a 1b in the LSB of mask 1 means that the
filter module should compare the LSB of nibble 1 in the pattern register to the first data bit on the transaction. If these match, then a true
result is returned. A 0b in a mask bit means that the filter module should ignore that data bit of the transaction. If all 0s are programmed in
the mask bits, the filter matches all patterns returning a true result (default 00h).
78 Internal Control Registers Copyright © 2005–2011, Texas Instruments Incorporated
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