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ZQC PACKAGE

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YFF PACKAGE

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TWL1200

www.ti.com

SCES786A –JUNE 2009–REVISED NOVEMBER 2009

SDIO, UART, AND AUDIO VOLTAGE-TRANSLATION TRANSCEIVER

Check for Samples: TWL1200

FEATURES

• Level Translator • Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

– V

CCA

and V

CCB

Range of 1.1 V to 3.6 V

• ESD Protection Exceeds JESD 22

• Seamlessly Bridges 1.8-V/2.6-V

Digital-Switching Compatibility Gap Between – 2500-V Human-Body Model (A114-B)

2.6-V processors and TI’s Wi-Link (WL1271

– 250-V Machine Model (A115-A)

and WL1273)

– 1500-V Charged-Device Model (C101)

BGA PACKAGE TERMINAL ASSIGNMENTS

1 2 3 4 5 6 7

A SDIO_CLK(A) SDIO_CMD(A) AUDIO_CLK(A) AUD_DIR AUDIO_CLK(B) SDIO_CMD(B) SDIO_CLK(B)

B SDIO_DATA3(A) SDIO_DATA0(A) AUDIO_F-SYN(A) OE AUDIO_F-SYN(B) SDIO_DATA0(B) SDIO_DATA3(B)

C SDIO_DATA2(A) SDIO_DATA1(A) V

CCA

CCB

SDIO_DATA1(B) SDIO_DATA2(B)

D WLAN_EN(A) WLAN_IRQ(A) GND V

CCA

CCB

WLAN_EN(B) WLAN_IRQ(B)

E CLK_REQ(A) BT_EN(A) GND GND GND BT_EN(B) CLK_REQ(B)

F BT_UART_CTS(A) BT_UART_RTS(A) AUDIO_IN(A) SLOW_CLK(B) AUDIO_IN(B) BT_UART_RTS(B) BT_UART_CTS(B)

G BT_UART_RX(A) BT_UART_TX(A) AUDIO_OUT(A) SLOW_CLK(A) AUDIO_OUT(B) BT_UART_TX(B) BT_UART_RX(B)

WCS PACKAGE TERMINAL ASSIGNMENTS

1 2 3 4 5 6 7

A SDIO_CLK(A) SDIO_CMD(A) AUDIO_CLK(A) AUD_DIR AUDIO_CLK(B) SDIO_CMD(B) SDIO_CLK(B)

B SDIO_DATA3(A) SDIO_DATA0(A) AUDIO_F-SYN(A) OE AUDIO_F-SYN(B) SDIO_DATA0(B) SDIO_DATA3(B)

C SDIO_DATA2(A) SDIO_DATA1(A) NC

(1)

CCA

CCB

SDIO_DATA1(B) SDIO_DATA2(B)

D WLAN_EN(A) WLAN_IRQ(A) GND V

CCA

CCB

WLAN_EN(B) WLAN_IRQ(B)

E CLK_REQ(A) BT_EN(A) GND GND GND BT_EN(B) CLK_REQ(B)

F BT_UART_CTS(A) BT_UART_RTS(A) AUDIO_IN(A) SLOW_CLK(B) AUDIO_IN(B) BT_UART_RTS(B) BT_UART_CTS(B)

G BT_UART_RX(A) BT_UART_TX(A) AUDIO_OUT(A) SLOW_CLK(A) AUDIO_OUT(B) BT_UART_TX(B) BT_UART_RX(B)

(1) NC – No internal connection

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (34 pages)

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TWL1200 www.ti.com SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 SDIO, UART, AND AUDIO VOLTAGE-TRANSLATION TRANSCEIVER Check for Samples: TWL1200 FEATURES 1 • Level Translator – VCCA and VCCB Range of 1.1 V to 3.6 V Seamlessly Bridges 1.8-V/2.6-V Digital-Switching Compatibility Gap Between 2.
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TWL1200 SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 www.ti.com DESCRIPTION/ORDERING INFORMATION The TWL1200 is an 19-bit voltage translator specifically designed to seamlessly bridge the 1.8-V/2.6-V digital-switching compatibility gap between 2.6-V baseband and the TI Wi-Link-6 (WL1271/3). It is optimized for SDIO, UART, and audio functions. The TWL1200 has two supply-voltage pins, VCCA and VCCB, that can be operated over the full range of 1.1 V to 3.6 V.
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TWL1200 www.ti.com SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 TERMINAL FUNCTIONS (continued) TERMINAL ZQC BALL NO. YFF BUMP NO.
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TWL1200 SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 www.ti.
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TWL1200 www.ti.com SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 TYPICAL APPLICATION BLOCK DIAGRAM 1.8 V 2.
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TWL1200 SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VCCA Supply voltage range VCCB Supply voltage range VI Input voltage range MIN MAX –0.5 4.6 V V –0.5 4.6 I/O ports (A port) –0.5 4.6 I/O ports (B port) –0.5 4.6 Control inputs –0.5 4.6 A port –0.5 4.6 B port –0.5 4.6 A port –0.5 4.6 B port –0.5 4.
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TWL1200 www.ti.com SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 RECOMMENDED OPERATING CONDITIONS (1) MIN MAX VCCA Supply voltage VCCI 1.1 3.6 V VCCB Supply voltage 1.1 3.6 V VCCI × 0.65 3.6 VCCA × 0.65 3.6 VCCI – 0.2 VCCI 0 VCCI × 0.35 0 VCCA × 0.35 0 0.15 V V VIH High-level input voltage VIH High-level input voltage Low-level input voltage VIL Buffer type VCCO 1.1 V to 3.6 V 1.1 V to 3.6 V Switch type 1.1 V to 3.6 V 1.1 V to 3.6 V Buffer type and Control Logic 1.
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TWL1200 SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 www.ti.
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TWL1200 www.ti.com SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 ELECTRICAL CHARACTERISTICS (continued) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS ICCB Switch-type I/O are open and all other inputs are biased at either VCC or GND ICCA + ICCB VI = VCCI or GND, IO = 0 Cio Ci Co MIN TYP (1) MAX UNIT VCCA VCCB 1.1 V to 3.6 V 1.1 V to 3.6 V 15 3.6 V 0V –12 0V 3.6 V 14 1.1 V to 3.6 V 1.1 V to 3.
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TWL1200 SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 www.ti.com TIMING REQUIREMENTS VCCA = 2.5 V ± 0.2 V over recommended operating free-air temperature range (unless otherwise noted) VCCB = 1.8 V ± 0.
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TWL1200 www.ti.com SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 SWITCHING CHARACTERISTICS VCCA = 2.5 V ± 0.2 V over recommended operating free-air temperature range (unless otherwise noted) PARAMETER FROM (INPUT) TO (OUTPUT) SDIO_CMD(A) SDIO_CMD(B) TEST CONDITIONS VCCB = 1.8 V ± 0.15 V MIN Push-pull driving 7 Open-drain driving (H-to-L) 1.
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TWL1200 SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 www.ti.com SWITCHING CHARACTERISTICS VCCA = 3.3 V ± 0.3 V over recommended operating free-air temperature range (unless otherwise noted) PARAMETER FROM (INPUT) TO (OUTPUT) SDIO_CMD(A) SDIO_CMD(B) TEST CONDITIONS VCCB = 1.8 V ± 0.15 V MIN Push-pull driving 7 Open-drain driving (H-to-L) 1.
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TWL1200 www.ti.com SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 OPERATING CHARACTERISTICS TA = 25°C PARAMETER Enabled DATAx and CMD Disabled Enabled Clock Disabled Enabled 2-mA buffer Disabled Enabled 4-mA buffer Disabled Enabled 8-mA buffer Disabled Enabled 4-mA I/O Disabled TEST CONDITIONS Cpd input side Cpd output side Cpd input side CL = 0, f = 10 MHz, tr = tf = 1 ns Cpd output side Cpd input side VCCA = VCCB = 1.8 V VCCA = VCCB = 2.5 V 18.3 20.3 18.25 19.52 0.8 0.8 0.1 0.1 0.6 0.9 8.
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TWL1200 SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 0.25 0.28 Sw itch Type V CCA = V CCB = 1.8 V V IN = 0.15 V 0.24 0.26 0.23 0.25 0.22 0.24 TA = 85°C TA = 85°C 0.23 0.21 TA = 25°C V OL (V) V OL (V) Sw itch Type V CCA = V CCB = 2.6 V V IN = 0.15 V 0.27 0.20 TA = -40°C 0.19 TA = 25°C 0.22 0.21 TA = -40°C 0.20 0.19 0.18 0.18 0.17 0.17 0.
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TWL1200 www.ti.com SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 TYPICAL CHARACTERISTICS (continued) LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 0.15 0.15 4-m A Buffer Type V CCA = V CCB = 1.8 V V IN = 0.0 V 0.14 0.13 0.13 0.12 0.12 0.11 0.11 TA = 85°C 0.10 0.10 0.09 V OL (V) 0.09 V OL (V) 4-m A Buffer Type V CCA = V CCB = 2.6 V V IN = 0.0 V 0.14 TA = 25°C 0.08 0.07 TA = 85°C 0.08 0.07 TA = 25°C 0.06 0.06 TA = -40°C 0.
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TWL1200 SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 1.81 1.80 1.79 2.61 Sw itch Type V CCA = V CCB = 1.8 V V IN = 1.8 V 2.60 2.59 1.78 2.58 2.57 TA = -40°C V OH (V) V OH (V) 1.77 1.76 Sw itch Type V CCA = V CCB = 2.6 V V IN = 2.6 V 1.75 2.56 TA = -40°C 2.55 TA = 25°C TA = 25°C 1.74 2.54 TA = 85°C 1.73 1.72 2.52 1.71 2.51 1.
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TWL1200 www.ti.com SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 TYPICAL CHARACTERISTICS (continued) HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 1.81 1.80 4-m A Buffer Type 1.79 V CCA = V CCB = 1.8 V 1.78 V IN = 1.8 V 1.77 1.76 1.75 1.74 TA = -40°C 1.73 1.72 1.71 TA = 25°C 1.70 1.69 TA = 85°C 1.68 1.67 1.66 1.65 1.64 1.63 -4.0 -3.6 -3.2 -2.8 -2.4 -2.0 -1.6 -1.2 -0.8 -0.4 0.0 2.61 2.60 2.59 4-m A Buffer Type V CCA = V CCB = 2.6 V V IN = 2.6 V 2.58 2.57 TA = -40°C 2.
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TWL1200 SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) PROPAGATION DELAY TIME (HIGH TO LOW) vs LOAD CAPACITANCE PROPAGATION DELAY TIME (LOW TO HIGH) vs LOAD CAPACITANCE 6 6 Sw itch Type TA = -40°C 5 5 4 4 t PD(L-H) (ns) t PD(H-L) (ns) Sw itch Type TA = -40°C V CCA = V CCB = 1.8 V 3 V CCA = V CCB = 1.8 V 3 2 2 V CCA = V CCB = 2.6 V V CCA = V CCB = 2.6 V 1 1 0 0 0 10 20 30 40 50 0 60 10 20 50 Figure 17. Figure 18.
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TWL1200 www.ti.com SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 TYPICAL CHARACTERISTICS (continued) PROPAGATION DELAY TIME (HIGH TO LOW) vs LOAD CAPACITANCE PROPAGATION DELAY TIME (LOW TO HIGH) vs LOAD CAPACITANCE 6 6 Sw itch Type TA = 85°C Sw itch Type TA = 85°C 5 5 V CCA = V CCB = 1.8 V 4 t PD(L-H) (ns) t PD(H-L) (ns) 4 3 V CCA = V CCB = 1.8 V 3 2 2 V CCA = V CCB = 2.6 V V CCA = V CCB = 2.6 V 1 1 0 0 0 10 20 30 40 50 60 0 10 20 30 40 50 60 CL (pF) CL (pF) Figure 21.
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TWL1200 SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 www.ti.com Typical Application Wiring for TWL1200 When Connecting to the WL1271 Table 2. WL1271+TWL1200 Interface HOST (MSM) 20 PIN NAME BALL NO. TYPE TYPE BALL NO. PIN NAME VCCA C4 Power (3.0 V) Power (1.8 V) C5 VCCB WL1271 COB VCCA D4 Power (3.0 V) Power (1.
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TWL1200 www.ti.com SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 PARAMETER MEASUREMENT INFORMATION 2 × VCCO S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 × VCCO GND RL tw LOAD CIRCUIT FOR BUFFER-TYPE OUTPUTS VCCI VCCI/2 Input VCCO CL RL VTP 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 15 pF 15 pF 15 pF 2 kΩ 2 kΩ 2 kΩ 0.15 V 0.15 V 0.
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TWL1200 SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 www.ti.
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TWL1200 www.ti.
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TWL1200 SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 VCCB C www.ti.
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TWL1200 www.ti.com SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 PRINCIPLES OF OPERATION Applications The TWL1200 device has been designed to bridge the digital-switching compatibility gap between two voltage nodes to successfully interface logic threshold levels between a host processor and the Texas Instruments Wi-Link-6 WLAN/BT/FM products. It is intended to be used in a point-to-point topology when interfacing these devices that may or may not be operating at different interface voltages.
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TWL1200 SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 www.ti.com For bidirectional voltage translation, pullup resistors are included on the device for dc current sourcing capability. The VGATE gate bias of the N-channel pass transistor is set at a level that optimizes the switch characteristics for maximum data rate as well as minimal static supply leakage. Data can flow in either direction without guidance from a control signal.
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TWL1200 www.ti.com SCES786A – JUNE 2009 – REVISED NOVEMBER 2009 Package Dimensions The dimensions for the YFF package are shown in Table 3. See the package drawing at the end of this data sheet. Table 3. YFF Package Dimensions Packaged Device D E TWL1200YFFR 2.76 ± 0.03 mm 2.76 ± 0.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Aug-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) TWL1200YFFR DSBGA YFF 49 3000 180.0 8.4 TWL1200ZQCR BGA MI CROSTA R JUNI OR ZQC 48 2500 330.0 12.4 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 2.93 2.93 0.81 4.0 8.0 Q1 4.3 4.3 1.5 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Aug-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TWL1200YFFR DSBGA YFF 49 3000 182.0 182.0 17.0 TWL1200ZQCR BGA MICROSTAR JUNIOR ZQC 48 2500 338.1 338.1 20.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.