Datasheet

TXS4558 EVM Schematic

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Table 1. Bill of Materials

(1)(2)(3)(4)

Count RefDes Value Description Size Part Number MFR

1 C1 0.1 µF Capacitor, Ceramic, 50V, X7R, ±10% 1206 GRM319R71H104KA0 STD

3 C2, C3, C4 1 µF Capacitor, Ceramic, 16V, X7R, ±20% 1206 GRM319R71C105MC1 STD

4 J1, J2, J3, J4, PEC03SAAN Header, Male 3-pin, 100mil spacing, 0.100 inch x 3 PEC03SAAN Sullins

J5, J6, J7

3 J11, J12, J13 Connector, Banana Jack, Uninsulated 0.500 dia. inch 108-0740-001 Emerson

3 J8, J9, J10 Connector, SMB, Straight, PC mount 0.210 sq inch 131-3701-261 Emerson

2 SIM1, SIM2 7111S2015X02 Socket , SIM 17.20 X 29.70 7111S2015X02LF FCI

11 TP1, TP2, 5012 Test Point, 0.062 Hole 0.250 inch 5012 Keystone

TP3, TP4,

TP5, TP6,

TP7, TP8,

TP9, TP10,

TP11

1 U1 TXS4558RUK IC, Dual-SIM Card P/S With Level Translator and QFN TPS4558RUK TI

Dedicated Dual LDO

4 Shunts, 100 mil, Black 0.100 929950-00 3M<

1 – PCB, 3.5 In x 2.9 In x 0.062 In HVL013 Any

(1)

These assemblies are ESD sensitive, ESD precautions shall be observed.

(2)

These assemblies must be clean and free from flux and all contaminants. Use of no clean flux is not acceptable.

(3)

These assemblies must comply with workmanship standards IPC-A-610 Class 2.

(4)

Ref designators marked with an asterisk ('**') cannot be substituted. All other components can be substituted with equivalent MFG's

components.

TXS4558 Evaluation Module SLLU153– September 2011

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