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UC1823A, UC2823A, UC2823B,

UC3823A, UC3823B, UC1825A,

UC2825A, UC2825B, UC3825A, UC3825B

SLUS334E − AUGUST 1995 − REVISED SEPTEMBER 2010

HIGH-SPEED PWM CONTROLLER

FEATURES

D Improved Versions of the UC3823/UC3825

PWMs

D Compatible with Voltage-Mode or

Current-Mode Control Methods

D Practical Operation at Switching Frequencies

to 1 MHz

D 50-ns Propagation Delay to Output

D High-Current Dual Totem Pole Outputs

(2-A Peak)

D Trimmed Oscillator Discharge Current

D Low 100-μA Startup Current

D Pulse-by-Pulse Current Limiting Comparator

D Latched Overcurrent Comparator With Full

Cycle Restart

DESCRIPTION

The UC3823A and UC3823B and the UC3825A and

UC3825B family of PWM controllers are improved

versions of the standard UC3823 and UC3825 family.

Performance enhancements have been made to several

of the circuit blocks. Error amplifier gain bandwidth product

is 12 MHz, while input offset voltage is 2 mV. Current limit

threshold is assured to a tolerance of 5%. Oscillator

discharge current is specified at 10 mA for accurate dead

time control. Frequency accuracy is improved to 6%.

Startup supply current, typically 100 μA, is ideal for off-line

applications. The output drivers are redesigned to actively

sink current during UVLO at no expense to the startup

current specification. In addition each output is capable of

2-A peak currents during transitions.

BLOCK DIAGRAM

OSC

CLK/LEB

RAMP

EAOUT

INV

ILIM

VCC

1.25 V

10GND

(60%)

1.0 V

E/A

1.2 V

0.2 V

OVER CURRENT

CURRENT

LIMIT

5 V

SOFT−START COMPLETE

FAULT LATCH

RESTART

DELAY

PWM

LATCH

9 mA

250mA

RESTART

DELAY

LATCH

VREF

5.1 V

ON/OFF

UVLO

4 V

INTERNAL

BIAS

OUTA

OUTB

PGND

5.1 VREF

”B” 16V/10V

”A” 9.2V/8.4V

PWM COMPARATOR

UDG−02091

REF

GOOD

* On the UC1823A version, toggles Q and Q are always low.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments

semiconductor products and disclaimers thereto appears at the end of this data sheet.

www.ti.com

PRODUCTION DATA information is current as of publication date. Products

conform to specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all parameters.

Summary of content (20 pages)

PAGE 1
UC1823A, UC2823A, UC2823B, UC3823A, UC3823B, UC1825A, UC2825A, UC2825B, UC3825A, UC3825B www.ti.com SLUS334E − AUGUST 1995 − REVISED SEPTEMBER 2010 HIGH-SPEED PWM CONTROLLER FEATURES D Improved Versions of the UC3823/UC3825 D D D D DESCRIPTION The UC3823A and UC3823B and the UC3825A and UC3825B family of PWM controllers are improved versions of the standard UC3823 and UC3825 family. Performance enhancements have been made to several of the circuit blocks.
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UC1823A, UC2823A, UC2823B, UC3823A, UC3823B, UC1825A, UC2825A, UC2825B, UC3825A, UC3825B www.ti.com SLUS334E − AUGUST 1995 − REVISED SEPTEMBER 2010 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. DESCRIPTION (CONTINUED) Functional improvements have also been implemented in this family.
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UC1823A, UC2823A, UC2823B, UC3823A, UC3823B, UC1825A, UC2825A, UC2825B, UC3825A, UC3825B www.ti.com SLUS334E − AUGUST 1995 − REVISED SEPTEMBER 2010 TERMINAL FUNCTIONS NAME CLK/LEB TERMINAL NO. J or DW Q or L 4 5 I/O DESCRIPTION O Output of the internal oscillator Timing capacitor connection pin for oscillator frequency programming. The timing capacitor should be connected to the device ground using minimal trace length.
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UC1823A, UC2823A, UC2823B, UC3823A, UC3823B, UC1825A, UC2825A, UC2825B, UC3825A, UC3825B www.ti.com SLUS334E − AUGUST 1995 − REVISED SEPTEMBER 2010 ELECTRICAL CHARACTERISTICS TA = −55°C to 125°C for the UC1823A/UC1825A, TA = −40°C to 85°C for the UC2823x/UC2825x, TA = 0°C to 70°C for the UC3823x/UC3825x, RT = 3.65 kΩ, CT = 1 nF, VCC = 12 V, TA = TJ (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 5.05 5.1 5.
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UC1823A, UC2823A, UC2823B, UC3823A, UC3823B, UC1825A, UC2825A, UC2825B, UC3825A, UC3825B www.ti.com SLUS334E − AUGUST 1995 − REVISED SEPTEMBER 2010 ELECTRICAL CHARACTERISTICS TA = −55°C to 125°C for the UC1823A/UC1825A, TA = −40°C to 85°C for the UC2823x/UC2825x, TA = 0°C to 70°C for the UC3823x/UC3825x, RT = 3.
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UC1823A, UC2823A, UC2823B, UC3823A, UC3823B, UC1825A, UC2825A, UC2825B, UC3825A, UC3825B www.ti.com SLUS334E − AUGUST 1995 − REVISED SEPTEMBER 2010 APPLICATION INFORMATION The oscillator of the UC3823A, UC3823B, UC3825A, and UC3825B is a saw tooth. The rising edge is governed by a current controlled by the RT pin and value of capacitance at the CT pin (CCT). The falling edge of the sawtooth sets dead time for the outputs. Selection of RT should be done first, based on desired maximum duty cycle.
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UC1823A, UC2823A, UC2823B, UC3823A, UC3823B, UC1825A, UC2825A, UC2825B, UC3825A, UC3825B www.ti.com SLUS334E − AUGUST 1995 − REVISED SEPTEMBER 2010 LEADING EDGE BLANKING The UC3823A, UC2823B, UC3825A, and UC3825B perform fixed frequency pulse width modulation control. The UC3823A, and UC3823B outputs operate together at the switching frequency and can vary from zero to some value less than 100%. The UC3825A and UC3825B outputs are alternately controlled. During every other cycle, one output is off.
PAGE 8
UC1823A, UC2823A, UC2823B, UC3823A, UC3823B, UC1825A, UC2825A, UC2825B, UC3825A, UC3825B www.ti.com SLUS334E − AUGUST 1995 − REVISED SEPTEMBER 2010 UVLO, SOFT-START AND FAULT MANAGEMENT Soft-start is programmed by a capacitor on the SS pin. At power up, SS is discharged. When SS is low, the error amplifier output is also forced low. While the internal 9-μA source charges the SS pin, the error amplifier output follows until closed loop regulation takes over. Anytime ILIM exceeds 1.
PAGE 9
UC1823A, UC2823A, UC2823B, UC3823A, UC3823B, UC1825A, UC2825A, UC2825B, UC3825A, UC3825B www.ti.com SLUS334E − AUGUST 1995 − REVISED SEPTEMBER 2010 CONTROL METHODS Current Mode Voltage Mode UDG−95110 UDG−95109 . Figure 8. Control Methods SYNCHRONIZATION The oscillator can be synchronized by an external pulse inserted in series with the timing capacitor. Program the free running frequency of the oscillator to be 10% to 15% slower than the desired synchronous frequency.
PAGE 10
UC1823A, UC2823A, UC2823B, UC3823A, UC3823B, UC1825A, UC2825A, UC2825B, UC3825A, UC3825B www.ti.com SLUS334E − AUGUST 1995 − REVISED SEPTEMBER 2010 HIGH CURRENT OUTPUTS Each totem pole output of the UC3823A and UC3823AB, UC3825A, and UC3825B can deliver a 2-A peak current into a capacitive load. The output can slew a 1000-pF capacitor by 15 V in approximately 20 ns.
PAGE 11
UC1823A, UC2823A, UC2823B, UC3823A, UC3823B, UC1825A, UC2825A, UC2825B, UC3825A, UC3825B www.ti.com SLUS334E − AUGUST 1995 − REVISED SEPTEMBER 2010 UDG−95115 Figure 13. Ground Planes Diagram OPEN LOOP TEST CIRCUIT This test fixture is useful for exercising many functions of this device family and measuring their specifications. As with any wideband circuit, careful grounding and bypass procedures should be followed. The use of a ground plane is highly recommended. UDG−95116 Figure 14.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant UC2823ADWTR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 UC2825ADWTR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 UC3823ADWTR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) UC2823ADWTR SOIC DW 16 2000 367.0 367.0 38.0 UC2825ADWTR SOIC DW 16 2000 367.0 367.0 38.0 UC3823ADWTR SOIC DW 16 2000 367.0 367.0 38.0 UC3823BDWTR SOIC DW 16 2000 367.0 367.0 38.0 UC3825ADWTR SOIC DW 16 2000 367.0 367.0 38.0 UC3825BDWTR SOIC DW 16 2000 367.0 367.0 38.
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