Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - gate drivers Non-inverting High AND low side, Autonomous SOIC 8

PWM

CONTROLLER

+12V

ISOLATION

AND

FEEDBACK

+100V

SECONDARY

SIDE

CIRCUIT

CONTROL

DRIVE

UCC27200A/1A

UCC27200A, UCC27201A

www.ti.com

SLUSAF9A –FEBRUARY 2011– REVISED DECEMBER 2011

120-V Boot, 3-A Peak, High Frequency, High-Side/Low-Side Driver

Check for Samples: UCC27200A, UCC27201A

FEATURES

CONTENTS

• Specified from -40 °C to 140 °C

• Drives Two N-Channel MOSFETs in

Device Ratings 2

High-Side/Low-Side Configuration

Electrical Characteristics 4

• Maximum Boot Voltage 120 V

Device Information 11

• Maximum VDD Voltage 20 V

Application Information 14

• On-Chip 0.65-V VF, 0.6-Ω RD Bootstrap Diode

• Greater than 1 MHz of Operation

Additional References 22

• 20-ns Propagation Delay Times

• 3-A Sink, 3-A Source Output Currents DESCRIPTION

The UCC27200A/1A family of high frequency

• 8-ns Rise/7-ns Fall Time with 1000-pF Load

N-Channel MOSFET drivers include a 120-V

• 1-ns Delay Matching

bootstrap diode and high-side/low-side driver with

• Under Voltage Lockout for High-Side and

independent inputs for maximum control flexibility.

Low-Side Driver

This allows for N-Channel MOSFET control in

half-bridge, full-bridge, two-switch forward and active

• Offered in 8-Pin SOIC (D), PowerPad™ SOIC-8

clamp forward converters. The low-side and the

(DDA), SON-8 (DRM), SON-9 (DRC) and SON-10

high-side gate drivers are independently controlled

(DPR) Packages

and matched to 1-ns between the turn-on and turn-off

of each other. The UCC27200A/1A are based on the

APPLICATIONS

popular UCC27200/1 drivers, but offer some

• Power Supplies for Telecom, Datacom, and

enhancements. In order to improve performance in

noisy power supply environments the UCC27200A/1A

Merchant Markets

has an enhanced ESD input structure and also has

• Half-Bridge Applications and Full-Bridge

the ability to withstand a maximum of -18 V on its HS

Converters

pin.

• Isolated Bus Architecture

• Two-Switch Forward Converters

• Active-Clamp Forward Converters

• High Voltage Synchronous-Buck Converters

• Class-D Audio Amplifiers

Simplified Application Diagram

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2PowerPad is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (41 pages)

PAGE 1
UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com 120-V Boot, 3-A Peak, High Frequency, High-Side/Low-Side Driver Check for Samples: UCC27200A, UCC27201A FEATURES 1 • • 2 • • • • • • • • • • CONTENTS Specified from -40 °C to 140 °C Drives Two N-Channel MOSFETs in High-Side/Low-Side Configuration Maximum Boot Voltage 120 V Maximum VDD Voltage 20 V On-Chip 0.65-V VF, 0.
PAGE 2
UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. DESCRIPTION (CONT.) An on-chip bootstrap diode eliminates the external discrete diodes.
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UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com DEVICE RATINGS ABSOLUTE MAXIMUM RATINGS Over operating free-air temperature, unless noted, all voltages are with respect to VSS PARAMETER Supply voltage range, (2) (1) VALUE UNIT VDD -0.3 to 20 Input voltages on LI and HI, VLI, VHI -0.3 to 20 DC Output voltage on LO, VLO -0.3 to VDD + 0.3, Repetitive pulse <100 ns (3) -2 to VDD + 0.3 VHS – 0.3 to VHB + 0.
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UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com THERMAL INFORMATION THERMAL METRIC (1) (2) UCC27200A /UCC27201A UCC27200A /UCC27201A UCC27200A /UCC27201A DRM DRC DPR 8 PINS 9 PINS 10 PINS θJA Junction-to-ambient thermal resistance 36.2 43.7 34.8 θJCtop Junction-to-case (top) thermal resistance 41.6 49.9 32.1 θJB Junction-to-board thermal resistance 13.2 19.1 11.9 ψJT Junction-to-top characterization parameter 0.6 0.6 0.
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UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS over operating free-air temperature range, VDD = VHB = 12 V, VHS = VSS = 0 V, No load on LO or HO, TA = TJ = -40°C to +140°C, (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 0.8 UNIT Supply Currents IDD VDD quiescent current VLI = VHI = 0 0.4 UCC27200A f = 500 kHz, CLOAD = 0 2.5 4 UCC27201A f = 500 kHz, CLOAD = 0 3.8 5.5 0.4 0.8 2.5 4 0.
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UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.
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UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.
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UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com PIN FUNCTIONS PIN PIN NAME DRM/D/DDA DRC DPR VDD 1 1 1 DESCRIPTION I Positive supply to the lower gate driver. De-couple this pin to VSS (GND). Typical decoupling capacitor range is 0.22 μF to 1.0 μF. HB 2 2 2 I High-side bootstrap supply. The bootstrap diode is on-chip but the external bootstrap capacitor is required. Connect positive side of the bootstrap capacitor to this pin.
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UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com FUNCTIONAL BLOCK DIAGRAM 2 HB 3 HO 4 HS 8 LO 7 VSS UVLO LEVEL SHIFT HI 5 VDD 1 UVLO LI 6 Figure 1. TIMING DIAGRAMS LI Input (HI, LI) HI TDLRR, TDHRR LO Output (HO, LO) TDLFF, TDHFF HO TMON TMOFF Figure 2.
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UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS UCC27200A IDD OPERATING CURRENT vs FREQUENCY UCC27201A IDD OPERATING CURRENT vs FREQUENCY 10.0 10.0 VDD = 12 V No Load on Outputs VDD = 12 V No Load on Outputs 150oC IDDO - Operating Current - mA IDDO - Operating Current - mA 25oC 150oC 125oC 1.0 o 25 C -40oC 0.1 125oC 1.0 -40oC 0.1 100 10 1000 100 10 Frequency - kHz Figure 3. Figure 4.
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UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) UCC27200A INPUT THRESHOLD vs SUPPLY VOLTAGE UCC27201A INPUT THRESHOLD vs SUPPLY VOLTAGE 2.0 T= T = 25oC 25oC HI, LI - Input Threshold Voltage - V HI, LI - Input Threshold Voltage/VDD Voltage - % 50 Rising 48 46 Falling 44 42 1.8 Rising Falling 1.6 1.4 1.2 1.0 40 8 10 12 14 16 18 8 20 10 12 VDD - Supply Voltage - V 18 Figure 7. Figure 8.
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UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) LO AND HO HIGH LEVEL OUTPUT VOLTAGE vs TEMPERATURE LO AND HO LOW LEVEL OUTPUT VOLTAGE vs TEMPERATURE 0.45 0.45 ILO = IHO = -100 mA 0.35 VDD = VHB = 16 V VDD = VHB = 12 V 0.30 VDD = VHB = 8 V 0.25 0.20 0.15 0.10 ILO = IHO = 100 mA 0.40 VOL - LO/HO Output Voltage - V VOH - LO/HO Output Voltage - V 0.40 VDD = VHB = 20 V 0.35 VDD = VHB = 16 V 0.30 VDD = VHB = 12 V 0.
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UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.
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UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) DELAY MATCHING vs TEMPERATURE OUTPUT CURRENT vs OUTPUT VOLTAGE 7 3.5 V DD = VHB = 12 V VDD = VHB = 12 V 6 3.0 ILO, IHO - Output Current - A Delay Matching - ns 5 4 UCC27200ATMOFF 3 UCC27201ATMOFF UCC27201ATMON UCC27200ATMON 2 1 0 -50 -25 0 25 50 75 100 125 2.5 Pull-Down Current Pull-Up Current 2.0 1.5 1.0 0.
PAGE 15
UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com APPLICATION INFORMATION Functional Description The UCC27200A and UCC27201A are high-side/low-side drivers. The high-side and low-side each have independent inputs which allow maximum flexibility of input control signals in the application. The boot diode for the high-side driver bias supply is internal to the UCC27200A and UCC27201A.
PAGE 16
UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com Design Tips Switching the MOSFETs Achieving optimum drive performance at high frequency efficiently requires special attention to layout and minimizing parasitic inductances. Care must be taken at the driver die and package level as well as the PCB layout to reduce parasitic inductances as much as possible.
PAGE 17
UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com The ISOURCE current charges the CGS gate capacitor and the ISINK current discharges it. The rise and fall time of the voltage across the gate to source defines how quickly the MOSFET can be switched. Based on actual measurements, the analytical curves in Figure 24 and Figure 25 indicate the output voltage and current of the drivers during the discharge of the load capacitor.
PAGE 18
UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com Turning off the MOSFET needs to be achieved as fast as possible to minimize switching losses. For this reason the UCC2720x drivers are designed for high peak currents and low output resistance. The sink capability is specified as 0.18 V at 100-mA dc current implying 1.8-Ω RDS(on). With 12-V drive voltage, no parasitic inductance and a linear resistance, one would expect initial sink current amplitude of 6.
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UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com Dynamic Switching of the MOSFETs The true behavior of MOSFETS presents a dynamic capacitive load primarily at the gate to source threshold voltage. Using the turn off case as the example, when the gate to source threshold voltage is reached the drain voltage starts rising, the drain to gate parasitic capacitance couples charge into the gate resulting in the turn off plateau.
PAGE 20
UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 + + + www.ti.com Figure 30.
PAGE 21
UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com Delay Matching and Narrow Pulse Widths The total delays encountered in the PWM, driver and power stage need to be considered for a number of reasons, primarily delay in current limit response. Also to be considered are differences in delays between the drivers which can lead to various concerns depending on the topology.
PAGE 22
UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com Boot Diode Performance The UCC2720x family of drivers incorporates the bootstrap diode necessary to generate the high side bias internally. The characteristics of this diode are important to achieve efficient, reliable operation. The dc characteristics to consider are VF and dynamic resistance. A low VF and high dynamic resistance results in a high forward voltage during charging of the bootstrap capacitor.
PAGE 23
UCC27200A, UCC27201A SLUSAF9A – FEBRUARY 2011 – REVISED DECEMBER 2011 www.ti.com Figure 35. Example Component Placement Additional References These references and links to additional information may be found at www.ti.com. 1. Additional layout guidelines for PCB land patterns may be found in Application Brief SLUA271 2.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Mar-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant UCC27200ADDAR SO Power PAD DDA 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 UCC27200ADRMR VSON DRM 8 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 UCC27200ADRMT VSON DRM 8 250 180.0 12.4 4.25 4.25 1.15 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Mar-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) UCC27200ADDAR UCC27200ADRMR SO PowerPAD DDA 8 2500 367.0 367.0 35.0 VSON DRM 8 3000 367.0 367.0 35.0 UCC27200ADRMT VSON DRM 8 250 210.0 185.0 35.0 UCC27201ADDAR SO PowerPAD DDA 8 2500 367.0 367.0 35.0 UCC27201ADPRR WSON DPR 10 3000 367.0 367.0 35.0 UCC27201ADPRT WSON DPR 10 250 210.0 185.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.