Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - voltage regulators - DC DC switch controllers TSSOP 20

OVP

RAMP

SS SRB

SRA

OUTB

OUTA

COMP

GND

UCC28250

VIN (36 V ~ 75 V)

LO LO

UCC27200

VIN (36 V ~ 75 V)

Feedback and Isolation

Isolation UCC2732x

OUT

Not Shown: PS, SP, HICC, VDD, EA+, EA-, VREF, EN, ILIM, AND VSENSE

UCC28250

www.ti.com

SLUSA29C –APRIL 2010– REVISED JULY 2011

Advanced PWM Controller With Pre-Bias Operation

Check for Samples: UCC28250

FEATURES

DESCRIPTION

The UCC28250 PWM controller is designed for high

• Pre-biased Startup

power density applications that may have stringent

• Synchronous Rectifier Control Outputs with

pre-biased startup requirements. The UCC28250’s

Programmable Delays (Including Zero Delay

integrated synchronous rectifier control outputs target

Support)

high efficiency and high performance topologies such

as half-bridge, full-bridge, interleaved forward, and

• Voltage Mode Control with Input Voltage

push-pull. The UCC27200 half bridge drivers and

Feed-Forward or Current Mode Control

UCC2732X MOSFET drivers used in conjunction with

• Primary or Secondary-Side Control

the UCC28250 provide a complete power converter

• 3.3-V, 1.5% Accurate Reference Output

solution.

• 1-MHz Capable Switching Frequency

Externally programmable soft-start, used in

• 1% Accurate Cycle-by-Cycle Over Current

conjunction with an internal pre-biased startup circuit,

Protection with Matched Duty Cycle Outputs

allows the controller to gradually reach a steady-state

operating point under all output conditions. The

• Programmable Soft-Start and Hiccup Restart

UCC28250 can be configured for primary or

Timer

secondary-side control and either voltage or current

• Thermally Enhanced 4-mm x 4-mm QFN-20

mode control can be implemented.

Package and 20-pin TSSOP Package

The oscillator operates at frequencies up to 2 MHz,

and can be synchronized to an external clock. Input

APPLICATIONS

voltage feedforward, cycle-by-cycle current limit, and

• Half-Bridge, Full-Bridge, Interleaved Forward,

a programmable hiccup timer allow the system to

and Push-Pull Isolated Converters

stay within a safe operation range. Input voltage,

output voltage and temperature protection can be

• Telecom and Data-com Power

implemented. Dead time between primary-side switch

• Wireless Base Station Power

and secondary-side synchronous rectifiers can be

• Server Power

independently programmed.

• Industrial Power Systems

Simplified Application Diagram

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (53 pages)

PAGE 1
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com Advanced PWM Controller With Pre-Bias Operation Check for Samples: UCC28250 FEATURES DESCRIPTION • • The UCC28250 PWM controller is designed for high power density applications that may have stringent pre-biased startup requirements. The UCC28250’s integrated synchronous rectifier control outputs target high efficiency and high performance topologies such as half-bridge, full-bridge, interleaved forward, and push-pull.
PAGE 2
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com ORDERING INFORMATION TEMPERATURE RANGE TA = TJ PACKAGE TAPE AND REEL QTY Plastic 20-pin QFN (RGP) -40°C to 125°C Plastic 20-pin TSSOP (PW) PART NUMBER 250 UCC28250RGPT 3000 UCC28250RGPR 250 UCC28250PWT 3000 UCC28250PWR ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (1) (2) (unless otherwise noted) PARAMETER VDD (3) VALUE Input supply voltage HBM -0.3 to 20.0 OUTA, OUTB, SRA and SRB -0.3 to VDD + 0.
PAGE 3
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) MIN Supply voltage range, VDD TYP 4.7 Supply bypass capacitor, CVDD MAX 12 UNIT 17 V 1 VREF bypass capacitor 0.5 2 Error amplifier input common mode range (REF/EA+, FB/EA-) 0 3.0 VSENSE input voltage range 0 3.3 12.
PAGE 4
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com ELECTRICAL CHARACTERISTICS(1) (continued) VDD = 12 V, 1-µF capacitor from VDD and VREF to GND, TA = TJ = -40°C to 125°C, RT = 75 kΩ connected to ground to set FSW = 200 kHz (unless otherwise noted).
PAGE 5
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com ELECTRICAL CHARACTERISTICS(1) (continued) VDD = 12 V, 1-µF capacitor from VDD and VREF to GND, TA = TJ = -40°C to 125°C, RT = 75 kΩ connected to ground to set FSW = 200 kHz (unless otherwise noted). PARAMETER TEST CONDITION MIN TYP MAX UNITS OVP/OTP Comparator VOVP Internal reference IOVP Internal current 0.66 0.70 0.74 V 8.5 11.0 13.
PAGE 6
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com DEVICE INFORMATION Over temperature OUTB SRA SRB 9 8 7 6 OTP + 4.1V/4.3V OUTA Functional Block Diagram UVLO VDD 5 Vref OK Switching Logic 2 FB/EA- 1 REF/EA+ 13 SS 16 RAMP/CS 14 VSENSE 4 GND OP + + OCP Vref ready + Enable detection Level&pulse EN 18 Enable + Cycle by cycle current limit & duty cycle match + 0.
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UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com + Typical Application Diagram Figure 1.
PAGE 8
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 + www.ti.com Figure 2.
PAGE 9
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.
PAGE 10
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com TERMINAL FUNCTIONS 10 QFN-20 PW-20 NAME I/O FUNCTION 5 12 VDD I Bias supply input. 20 7 VREF O 3.3-V reference output. 18 5 EN I Device enable and disable. 15 2 RT I Oscillator frequency set or synchronous clock input. 12 19 SP I Synchronous rectifier off to primary on dead-time set . 11 18 PS I Primary off to synchronous rectifier on dead-time set .
PAGE 11
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com DETAILED PIN DESCRIPTIONS VDD (5/12) The UCC28250 can be powered up by a wide supply range from 4.3 V (UVLO rising typical) to 20 V (absolute maximum), making it suitable for primary-side control or secondary-side control. When the voltage at the VDD pin is lower than 4.1 V (typical), the controller is in stand-by mode and consumes 150 µA (typical) at 3.6 V VDD. In stand-by mode, VREF continues to be regulated to 3.
PAGE 12
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com A pulse signal may also be applied to the EN pin. Pulse-enable operation is shown on Figure 4. If the EN falling edge happens before the SS voltage reaches 0.3 V, the enable signal at EN pin is considered as a pulse. In this case, the next rising edge at EN pin disables the controller. If the falling edge of the first pulse at EN pin happens after SS rises to 0.
PAGE 13
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com RT (Oscillator Frequency Set and Synchronization) (15/2) The UCC28250 oscillator frequency is set by an external resistor connected between the RT pin and ground. Switching frequency selection is a trade-off between efficiency and component size. Based on the selected switching frequency, the programming resistor value can be calculated as: 1 - Td(SP ) 2 ´ fSW RT = 33.
PAGE 14
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com Frequency Source OUTA OUTB Figure 7. Timing Diagram for Synchronization CLK OUTA SRA Td(SP) Td(PS) OUTB SRB Td(SP) Td(PS) Figure 8.
PAGE 15
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com SP (Synchronous Rectifier Turn-Off to Primary Output Turn-On Dead Time Programming) (13/19) The dead time TD(sp) between synchronous rectifier turn-off to primary output turn-on is programmed by an external resistor, RSP, connected between the SP pin and ground. The value of RSP can be determined by Figure 9. Zero dead time can be achieved by tying the SP pin to VREF.
PAGE 16
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com PS (Primary Output Turn-Off to Synchronous Rectifier Turn-On Dead Time Programming) (11/18) The dead time TD(ps) between primary output turn-off to synchronous rectifier turn-on is set by external resistor, RPS, connected between PS pin and ground. The value of is RPS is defined by Figure 10. Zero dead time can be achieved by tying the SP pin to VREF. NOTE The minimum value for RPS/RSP is 5 kΩ and the maximum value is 250 kΩ.
PAGE 17
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com RAMP/CS (PWM Ramp Input or Current Sense Input) (16/3) The UCC28250 can be controlled using either voltage mode or current mode. RAMP/CS is a multi-function pin used either to generate the ramp signal for voltage mode control or to sense current for current mode control.The following sections describe the RAMP/CS functionality for voltage mode and current mode control.
PAGE 18
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com CS: Current Mode Control For current mode control, the RAMP/CS pin is driven by a signal representative of the transformer primary-side current. The current signal has to have compatible input range of the COMP pin. As shown in Figure 12, the COMP pin voltage is used as the reference for peak current.
PAGE 19
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com FB/EA- (2/9) FB/EA- is the inverting input of the UCC28250’s internal error amplifier. When the UCC28250 is configured for secondary-side control, connect the output voltage sensing divider to this pin. The voltage divider can be selected according to the voltage on REF/EA+ pin.
PAGE 20
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com SS (Soft Start Programming Pin) (13/20) The soft-start circuit gradually increases the converter’s output voltage until steady state operation is reached. This reduces start-up stresses and current surge. When the UCC28250 reaches its valid operating threshold, the SS pin capacitor is charged with a 27-µA current source.
PAGE 21
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com For primary-side control, the internal error amplifier is connected as a buffer stage. In other words, the COMP pin is shorted to the FB/EA- pin, and the output of an external error amplifier is connected to the REF/EA+ pin through an optical coupler (Figure 14). In this case, the output start-up is an open loop soft start because the COMP follows the soft-start voltage instead of the voltage loop output.
PAGE 22
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com ILIM (Current Limit for Cycle-By-Cycle Over-Current Protection) (17/4) Cycle-by-cycle current limit is accomplished using the ILIM pin for current mode control or for voltage mode control. The input to the ILIM pin represents the primary current information. If the voltage sensed at ILIM pin exceeds 0.5 V, the current sense comparator terminates the pulse of output OUTA or OUTB.
PAGE 23
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com HICC (10/17) The cycle-by-cycle current limit operation time before all four outputs shut down can be programmed by an external capacitor CHICC from HICC pin to ground, as shown in Figure 15. Once all four outputs are shutdown, controller goes into hiccup cycle which is about 100 times of the cycle-by-cycle current limit shut-down delay time. A 1-mA internal current source charges HICC pin up to 2.4 V, then the HICC pin is discharged by a 2.
PAGE 24
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com OVP/OTP (19/6) The OVP/OTP pin provides multiple fault protection functions. If the voltage on the OVP/OTP pin exceeds 0.7 V, a fault shutdown occurs. All outputs stop switching and stay off (low) during the shutdown, and the SS pin is pulled to ground internally. Once the fault condition is cleared (i.e. OVP/OTP voltage drops below 0.7 V), the UCC28250 enters hiccup mode. A soft-start cycle begins after the hiccup cycle is finished.
PAGE 25
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com UCC28250 VREF R1 11 mA R3 OVP + 0.7 V PTC Figure 18. Over Temperature Protection Figure 19 shows an external configuration using the OVP/OTP pin to achieve both over-voltage and over temperature protection. Follow the same design procedure for the OVP setting to choose R1, R2, and R3.
PAGE 26
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com TYPICAL CHARACTERISTICS START-UP CURRENT vs TEMPERATURE STAND-BY CURRENT vs TEMPERATURE 240 465 VDD = 3.6 V VDD = 12 V 450 IDD(dis) - Stand-by Current - mA IDD(off) - Start-Up Current - mA 220 200 180 160 140 435 420 405 390 120 100 375 -45 -15 15 45 75 105 135 -15 -45 TJ - Temperature - °C 75 105 135 TJ - Temperature - °C Figure 21.
PAGE 27
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) OPERATING SUPPLY CURRENT vs TEMPERATURE SOFT-START CURRENT vs TEMPERATURE 2.85 27.4 27.3 2.80 ISS - Soft-Start Current - mA IDD - Operating Supply Current - mA FSW = 200 kHz 2.75 2.70 2.65 27.2 27.1 27.0 26.9 2.60 26.8 -45 -15 15 45 75 105 135 -45 -15 TJ - Temperature - °C 75 105 135 TJ - Temperature - °C Figure 24. Figure 25.
PAGE 28
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) CURRENT LIMIT SHUTDOWN DELAY TIMER AND HICCUP RESTART vs TEMPERATURE 90 TBLANK 70 50 TPD_ILIM 30 10 -45 -15 15 75 45 105 135 VHICC_SD / VHICC_RST - Current Limit Shutdown Delay Timer and Hiccup Restart - V TPD_ILIM / TBLANK - Propagation Delay from ILIM to Outputs and Leading Edge Blanking - ns PROPAGATION DELAY/LEADING EDGE BLANKING vs TEMPERATURE 0.7 0.6 VHICC_SD 0.5 0.4 VHICC_RST 0.3 0.
PAGE 29
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) OVP INTERNAL REFERENCE vs TEMPERATURE OVP INTERNAL CURRENT vs TEMPERATURE 11.20 0.7015 11.15 IOVP - OVP Internal Currente - mA VOVP - OVP Internal Reference - V 0.7010 0.7005 0.7000 0.6995 0.6990 11.10 11.05 11.00 10.95 10.90 10.85 -45 -15 15 45 75 105 135 -45 -15 TJ - Temperature - °C 45 75 105 Figure 32. Figure 33.
PAGE 30
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) NOMINAL SWITCHING FREQUENCY vs TEMPERATURE DEAD TIME vs TEMPERATURE 42.5 42.0 200.6 TDPS at RPS = 27 kW 41.5 TDSP/TDPS - Dead Time- ns FSW(nom) - Nominal Switching Frequency - kHz 201.0 200.2 199.8 199.4 41.0 40.5 40.0 TDSP at RSP = 20 kW 39.5 39.0 38.5 199.0 38.
PAGE 31
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com APPLICATION INFORMATION The UCC28250 is a high performance PWM controller with advanced synchronous rectifier outputs and is ideally suited for regulated half-bridge, full-bridge and push-pull converters. A dedicated internal pre-biased start up control loop working in conjunction with a primary-side voltage loop achieves monotonic pre-biased start up for either primary-side or secondary-side control applications.
PAGE 32
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com Pre-Biased Start Up With the internal error amplifier, UCC28250 supports both primary-side control and secondary-side control. For different control methods, the controller is configured accordingly and so is the pre-biased start-up control. During soft start, both the primary-side switches’ duty cycle and secondary-side SRs’ duty cycle are increased.
PAGE 33
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com Primary-Side Control When the UCC28250 is sitting on the primary side, the internal error amplifier is connected as a voltage follower and an extra error amplifier is needed on the secondary side for closed loop control. The error amplifier implementation is shown in Figure 41. VOUT UCC28250 RO2 CP1 VSENSE RZ3 CZ2 RZ2 VREF COMP CZ3 + FB/EA- REF/EA+ RO1 + + SS External Reference CSS Figure 41.
PAGE 34
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com Voltage Mode Control and Input Voltage Feed-Forward For voltage mode control, a resistor RCS and a capacitor CCS are connected externally at RAMP/CS pin as shown in Figure 42. A ramp signal is generated on the RAMP/CS pin, at a rate of two times that of the switching frequency. The generated ramp signal is used to control the duty cycle for both the primary-side switches and secondary-side synchronous rectifiers.
PAGE 35
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com The input voltage feedforward also helps on pre-biased start up. When doing primary-side control to pre-biased start up, three conditions need to be considered: Condition 1 At initial start up the primary side needs to provide enough energy to prevent output voltage dip; Condition 2 At the end of soft start, it is required to keep the SR duty cycle change to be as small as possible.
PAGE 36
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com Peak Current Mode Control For peak current mode control, RAMP/CS pin is connected directly with the current signal generated from a current transformer. The current signal must be compatible with the input range of the COMP pin. External slope compensation is required to prevent sub-harmonic oscillation and to maintain flux-balance.
PAGE 37
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com Cycle-by-Cycle Current Limit and Hiccup Mode Protection Cycle-by-cycle current limit is accomplished using the ILIM pin for both current mode control and voltage mode control. The input to the ILIM pin represents the primary current information. If the voltage sensed at ILIM pin exceeds 0.5 V, the current sense comparator terminates the pulse of output OUTA or OUTB.
PAGE 38
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com The cycle-by-cycle current limit operation time before all four outputs shut down is programmed by external capacitor CHICC at HICC pin. The delay time can be calculated as: TOC(delay ) = CHICC ´ 0.6 V 75 mA (27) The hiccup timer keeps all outputs being zero until the timer expires. The hiccup time THICC is calculated as: THICC = CHICC ´ 2.4 V - 0.3 V 2.
PAGE 39
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com Design Example The example provided here is to show how to design a symmetrical half bridge converter of voltage mode control with UCC28250 on primary side. + Figure 46 is the circuit diagram to be used in this design example. This design example is to show how to determine the values in the circuit associated to UCC28250 programming. Figure 46. Circuit Diagram in Design Example. Table 1 shows the specifications for the design example.
PAGE 40
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com Design Steps Step 1, Power Stage Design The power stage design in this example is standard and the same as that for symmetrical half bridge converter of voltage mode control. From the standard design, these components are determined. This includes Q1 through Q4, C1, C2, CT1, D1 and D2, D3, T1, T2 and T3, and U6. Their design is standard. Also, design associated to current sensing and protection is also standard.
PAGE 41
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com Step 3, Programming the Device Step 3-1 Equation 3 is used to determine RT based on switching frequency, 300 kHz and assumes the dead time of 150 ns. 1 1 - Td(SP ) - 150ns 2 ´ fSW 2 ´ 150kHz RT = = = 94.9kW Þ R4 = 100kW 33.2pF 33.2pF (29) Step 3-2, Determine RAMP Resistance and Capacitance There are two-fold considerations to determine RAMP resistance and capacitance.
PAGE 42
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com Step 3-3, Determine Soft-Start Capacitance Determine soft-start capacitance with soft-start time 15 ms. CSS = 27 mA ´ TSS 27 mA ´ 15ms = = 0.101mF Þ C8 = 0.1mF VCOMP( final) 4.0 V (37) Step 3-4, Determine Dead-Time Resistance Assuming the dead time is 150 ns, Select R7 = R8 = 121 kΩ based on Figure 9 and Figure 10. Step 3-5, Determine OCP Hiccup Off-Time Capacitance Assuming off time is 0.8 s (Equation 15). CHICC = THICC ´ 2.7 mA 2.
PAGE 43
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 + + www.ti.com Figure 47.
PAGE 44
UCC28250 SLUSA29C – APRIL 2010 – REVISED JULY 2011 www.ti.com REVISION HISTORY Changes from Revision A (April, 2010) to Revision B • Page Added note, "The minimum value for RPS/RSP is 5 kΩ and the maximum value is 250 kΩ." in two places. ...................... 15 Changes from Revision B (October 2010) to Revision C Page • Changed Operating junction temperature range from (-40 to 125) to (125 to 150). .............................................................
PAGE 45
PACKAGE OPTION ADDENDUM www.ti.
PAGE 46
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant UCC28250PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 UCC28250RGPR QFN RGP 20 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 UCC28250RGPT QFN RGP 20 250 180.0 12.4 4.25 4.25 1.15 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) UCC28250PWR TSSOP PW 20 2000 367.0 367.0 38.0 UCC28250RGPR QFN RGP 20 3000 367.0 367.0 35.0 UCC28250RGPT QFN RGP 20 250 210.0 185.0 35.
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