Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - LDO voltage regulator Negative, fixed SOIC 8

UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ

LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR

SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Precision Negative Series Pass Voltage

Regulation

D 0.2 V Dropout at 0.5 A

D Wide Input Voltage Range –3.2 V to –15 V

D Low Quiescent Current Irrespective of Load

D Simple Logic Shutdown Interfacing

D –5 V, –12 V, and Adjustable Output

D 2.5% Duty Cycle Short Circuit Protection

description

The UCC384-x family of negative linear-series pass regulators is tailored for low-dropout applications where

low-quiescent power is important. Fabricated with a BCDMOS technology ideally suited for low input-to-output

differential applications, the UCC384-x passes 0.5 A while requiring only 0.2 V of input-voltage headroom.

Dropout voltage decreases linearly with output current, so that dropout at 50 mA is less than 20 mV.

Quiescent current consumption for the device under normal (non-dropout) conditions is typically 200 µA. An

integrated charge pump is internally enabled only when the device is operating near dropout with low VIN. This

ensured that the device meets the dropout specifications even for maximum load current and a VIN of –3.2 V

with only a modest increase in quiescent current. Quiescent current is always less than 350 µA, with the charge

pump enabled. The quiescent current of the UCC384 does not increase with load current.

Short-circuit current is internally limited. The device responds to a sustained overcurrent condition by turning

off after a t

delay. The device then stays off for a period, t

OFF

, that is 40 times the t

delay. The device then

begins pulsing on and off at the t

OFF

duty cycle of 2.5%. This drastically reduces the power dissipation during

short circuit such that heat sinking, if at all required, must only accommodate normal operation. An external

capacitor sets the on time. The off time is always 40 times t

The UCCx84-x can be shutdown to 45 µA (maximum) by pulling the SD/CT pin more positive than –0.7 V. To

allow for simpler interfacing, the SD/CT pin may be pulled up to 6 V above the ground pin without turning on

clamping diodes.

Internal power dissipation is further controlled with thermal-overload protection circuitry. Thermal shutdown

occurs if the junction temperature exceeds 140°C. The chip remains off until the temperature has dropped 20°C

= 120°C).

AVAILABLE OPTIONS

OUTPUT VOLTAGE (V) PACKAGE DEVICES

TYP (SOIC) DP

–5 UCC284DP–5

–40°C to 85°C

–12 UCC284DP–12

40 C

85 C

ADJ UCC284DP–ADJ

–5 UCC384DP–5

0°C to 70°C

–12 UCC384DP–12

ADJ UCC384DP–ADJ

†

All package types are available taped and reeled. Add TR suffix to device type

(e.g. UCC284DP–5TR) to order quantities of 3000 devices per reel.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

DP PACKAGE

(FRONT VIEW)

VIN

SD/CT

VOUT

VIN

VOUTS

VIN

GND

Summary of content (15 pages)

PAGE 1
UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002 D Precision Negative Series Pass Voltage D D D D D D DP PACKAGE (FRONT VIEW) Regulation 0.2 V Dropout at 0.5 A Wide Input Voltage Range –3.2 V to –15 V Low Quiescent Current Irrespective of Load Simple Logic Shutdown Interfacing –5 V, –12 V, and Adjustable Output 2.
PAGE 2
UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002 functional block diagram (+) 1– µ A DISCHARGE UCC384–ADJ + SHUTDOWN –2.2 V –0.7 V R1 R2 0 OPEN UCC384–5 375K 125K UCC384–12 375K 43.6K 1.25 V 50 k 4 GND 1 VOUTS 5 VOUT R2 + –1.6 V SD/CT S Q R Q TON 8 –2.
PAGE 3
UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002 electrical characteristics TA = 0°C to 70°C for the UCC384 and –40°C to 85°C for the UCC284, VIN = VOUT – 1.5 V, IOUT = 0 mA, COUT = 4.7 µF, and CT = 0.015 µF. For UCC384–ADJ, VOUT is set to –3.3V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT –4.925 V UCC384–5 Fixed –5-V 0.5-A Regulation Section –5.
PAGE 4
UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002 electrical characteristics TA = 0°C to 70°C for the UCC384 and –40°C to 85°C for the UCC284, VIN = VOUT – 1.5 V, IOUT = 0 mA, COUT = 4.7 µF, and CT = 0.015 µF. For UCC384–ADJ, VOUT is set to –3.3V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT UCC384–12 Fixed –12 V-0.
PAGE 5
UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002 pin descriptions GND: This is the low noise ground reference input. All voltages are measured with respect to the GND pin. SD/CT: This is the shutdown pin and also the short-circuit timing pin. Pulling this pin more positive than –0.7 V puts the circuit in a low-current shutdown mode.
PAGE 6
UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002 APPLICATION INFORMATION programming the output voltage on the UCC384 (continued) (+) (+) CT 0.015µF 4 R2 GND 8 SD/CT VOUTS 1 CIN + 1 µF VIN COUT 4.7µF C1 UCC384–ADJ VOUT VIN VIN VIN VIN 2 3 6 7 VOUT + R1 5 (–) (–) UDG–99029 Figure 1.
PAGE 7
UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002 APPLICATION INFORMATION short-circuit protection (continued) DROPOUT VOLTAGE vs OUTPUT VOLTAGE IOUT = 0.4 A 0.20 IOUT = 0.5 A 0.15 0.10 0.05 IOUT = 0.2 A (VIN–VOUT) – Dropout Voltage – V 0.25 IOUT = 0.3 A 0.25 VOUT = –5 V 0.20 VOUT = –3.3 V 0.15 0.10 VOUT = –12 V 0.05 VOUT = –15 V IOUT = 0.1 A 0.
PAGE 8
UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002 APPLICATION INFORMATION t OFF t OFF t ON t ON t ON IOUT=0A ~40 x tON ~40 x tON IOUT (NOM) IOVER IPEAK NOTE: CURRENT FLOW IS INTO THE DEVICE VOUT = 0V VOUT =(IPEAK)(RL) VOUT NOM. (–V) CT = 0V CT (NOM) = – 1.6V CT = – 2.6V UDG–99031 Figure 5.
PAGE 9
UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002 APPLICATION INFORMATION UCC384 short-circuit timing (continued) During an overcurrent condition, the regulator actively limits the maximum output current to the peak-current limit.
PAGE 10
UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002 APPLICATION INFORMATION UCC384–ADJ OVERCURRENT CONDITION OPERATION 1 ms/div UCC384–ADJ OVERCURRENT CONDITION OPERATION 25 ms/div Figure 6 Figure 7 shutdown feature of the UCC384 The shutdown feature of the UCC384 allows the device to be placed in a low quiescent current mode. The UCC384 is shut down by pulling the SD/CT pin more positive than –0.
PAGE 11
UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002 APPLICATION INFORMATION controlling the SD/CT pin Forcing the SD/CT pin to any fixed voltage affects the operation of the circuit. As mentioned before, pulling the SD/CT pin more positive than –0.7 V puts the circuit in a shutdown mode, limiting the quiescent current to less than 45 µA.
PAGE 12
UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002 APPLICATION INFORMATION VIN to VOUT Delay During power-up there is a delay between VIN and VOUT. The majority of this delay time is due to the charging time of the CT capacitor. When VIN moves more negative than the UVLO of the device with respect to GND, the CT capacitor begins to charge.
PAGE 13
UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002 APPLICATION INFORMATION VIN to VOUT Delay VIN TO VOUT DELAY TIME WITH QUICK START-UP CIRCUIT VIN TO VOUT DELAY TIME WITH CT CAPACITOR REMOVED Figure 11 Figure 12 operation of the quick start-up circuit During normal start-up, the UCC384 does not turn on until the voltage on the SD/CT pin reaches approximately –1.6 V with respect to ground.
PAGE 14
UCC284–5, UCC284–12, UCC284–ADJ, UCC384–5, UCC384–12, UCC384–ADJ LOW-DROPOUT 0.5-A NEGATIVE LINEAR REGULATOR SLUS234D – JANUARY 2000 – REVISED FEBRUARY 2002 APPLICATION INFORMATION operation of the quick start-up circuit (continued) 0.9 R3 + C2(F) ȏn t ǒ M seconds Ǔ V (8) Ohms (V)*1.6 1 * IN V (V) IN After the CT capacitor has charged up for a time equal to 0.9 × tM , Q1 turns off and allows the SD/CT pin to be pulled back to –1.5 V with respect to GND through a 50-kΩ resistor.
PAGE 15
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