Datasheet
SLUS517C − DECEMBER 2002 − REVISED SEPTEMBER 2005
17
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APPLICATION INFORMATION
The current sense resistor for the PFC stage, R2, is selected to operate over a 1-V dynamic range (V
DYNAMIC
).
The sense resistor must also have a large enough power rating to permit safe operation with the maximum RMS
line current.
R2 +
V
DYNAMIC
i
L1(max)
) 0.5 Di
L1(p−p)
where, i
L1(max)
+
2
Ǹ
P
IN
V
AC(min)
The PFC I
LIMIT
comparator threshold is at the ground reference for the controller device. So, the PFC current
sense voltage, measured at PKLMT must be biased with a positive voltage to cross 0.0 V when the
instantaneous PFC current is at its maximum. The bias voltage is established with R14 and R7, as shown in
equation 7, and resistor R14 is arbitrarily chosen around 10 kΩ.
R7
R14
+
1
V
REF
i
L1(max)
R2
* 1
The capacitance value of the energy storage capacitor, C1 is selected to meet hold-up time requirements (t
HU
)
by the equation:
C1 +
2 P
OUT
t
HU
V
C1
2
k
R1
ǒ
2 * k
R1
Ǔ
Capacitor C1 must be rated for the selected energy storage voltage and it must be able to withstand the rms
ripple current, I
C1(rms)
, that is produced by the combined action of the PFC stage and the PWM stage. The
average Q2 drain current during the interval that GT2 activates MOSFET Q2 is used to find I
C1(rms)
. An initial
estimate can be made using the inequality in equation 9, then consult Figure 3 or Figure 4 for better accuracy.
I
C1(rms)
I
Q2
t
8 2
Ǹ
D
2(nom)
2
V
C1(nom)
3 p V
AC(min)
) D
2(nom)
Ǹ
The ratio of I
C1(rms)
to I
Q2
can be found by using the appropriate graph, Figure 3 for the 1X:1X oscillator option
or Figure 4 for the 1X:2X oscillator option. To use the graphs, locate the ratio of VAC to V
C1
along the horizontal
axis then, draw a vertical line to the intersection of the curve for the duty ratio of the PWM stage. Draw a
horizontal line from the intersection to the vertical axis and read the ratio of I
C1(rms)
to I
Q2
.
(6)
(7)
(8)
(9)