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SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009

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D Controls Boost Preregulator to Near-Unity

Power Factor

D Limits Line Distortion

D World Wide Line Operation

D Over-Voltage Protection

D Accurate Power Limiting

D Average Current Mode Control

D Improved Noise Immunity

D Improved Feed-Forward Line Regulation

D Leading Edge Modulation

D 150-µA Typical Start-Up Current

D Low-Power BiCMOS Operation

D 12-V to 17-V Operation

D Frequency Range 6 kHz to 220 kHz

description

The UCCx817/18 family provides all the functions necessary for active power factor corrected preregulators.

The controller achieves near unity power factor by shaping the ac input line current waveform to correspond

to that of the ac input line voltage. Average current mode control maintains stable, low distortion sinusoidal line

current.

Designed in Texas Instrument’s BiCMOS process, the UCC2817/UCC2818 offers new features such as lower

start-up current, lower power dissipation, overvoltage protection, a shunt UVLO detect circuitry, a leading-edge

modulation technique to reduce ripple current in the bulk capacitor and an improved, low-offset (±2 mV) current

amplifier to reduce distortion at light load conditions.

block diagram

UDG-98182

VREF9

DRVOUT

GND

CAI

VCC

OVP/EN

VAOUT

1.9 V

PKLMT

7.5 V

REFERENCE

UVLO

16 V/10 V (UCC2817)

10.5 V/10 V (UCC2818)

VCC

OSCILLATOR

PWM

LATCH

−

PWM

CAOUT

−

VOLTAGE

ERROR AMP

8.0 V

11VSENSE

VFF

IAC

MOUT

MIRROR

2:1

−

7.5 V

ENABLE

OVP

MULT

OSC

CLK

CURRENT

AMP

16 V (FOR UCC2817 ONLY)

−

0.33 V

ZERO POWER

−

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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

D, DW, N, and PW PACKAGES

(TOP VIEW)

GND

PKLMT

CAOUT

CAI

MOUT

IAC

VAOUT

VFF

DRVOUT

VCC

VSENSE

OVP/EN

VREF

Summary of content (31 pages)

PAGE 1
SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 D Controls Boost Preregulator to Near-Unity D D D D D D D D D D D D D, DW, N, and PW PACKAGES (TOP VIEW) Power Factor Limits Line Distortion World Wide Line Operation Over-Voltage Protection Accurate Power Limiting Average Current Mode Control Improved Noise Immunity Improved Feed-Forward Line Regulation Leading Edge Modulation 150-µA Typical Start-Up Current Low-Power BiCMOS Operation 12-V to
PAGE 2
SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 description (continued) UCC2817 offers an on-chip shunt regulator with low start-up current, suitable for applications utilizing a bootstrap supply. UCC2818 is intended for applications with a fixed supply (VCC). Available in the 16-pin D, DW, N and PW packages. absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage VCC . . . . . . . . . . . . . .
PAGE 3
SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 electrical characteristics, TA = 0°C to 70°C for the UCC3817 and TA = −40°C to 85°C for the UCC2817, TA = TJ, VCC = 12 V, RT = 22 kΩ, CT = 270 pF, (unless otherwise noted) supply current section PARAMETER TEST CONDITIONS Supply current, off VCC = (VCC turn-on threshold −0.
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SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 electrical characteristics, TA = 0°C to 70°C for the UCC3817 and TA = −40°C to 85°C for the UCC2817, TA = TJ, VCC = 12 V, RT = 22 kΩ, CT = 270 pF, (unless otherwise noted) voltage reference section PARAMETER Input voltage Load regulation Line regulation TEST CONDITIONS TA = 0°C to 70°C TA = −40°C to 85°C IREF = 1 mA to 2 mA VCC = 10.
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SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 electrical characteristics, TA = 0°C to 70°C for the UCC3817 and TA = −40°C to 85°C for the UCC2817, TA = TJ, VCC = 12 V, RT = 22 kΩ, CT = 270 pF, (unless otherwise noted) feed-forward section PARAMETER VFF output current TEST CONDITIONS IAC = 300 µA MIN TYP MAX UNITS −140 −150 −160 µA MIN TYP MAX UNITS −6 −10 −16 µA MIN TYP MAX UNITS 5 12 Ω 2 10 Ω 25 50 ns 10 50
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SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 pin descriptions (continued) IAC: (current proportional to input voltage) This input to the analog multiplier is a current proportional to instantaneous line voltage. The multiplier is tailored for very low distortion from this current input (IIAC) to multiplier output. The recommended maximum IIAC is 500 µA.
PAGE 7
SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 APPLICATION INFORMATION The UCC3817 is a BiCMOS average current mode boost controller for high power factor, high efficiency preregulator power supplies. Figure 1 shows the UCC3817 in a 250-W PFC preregulator circuit. Off-line switching power converters normally have an input current that is not sinusoidal.
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SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 APPLICATION INFORMATION power stage LBOOST : The boost inductor value is determined by: L BOOST + ǒVIN(min) (DI Ǔ D fs) where D is the duty cycle, ∆I is the inductor ripple current and fS is the switching frequency. For the example circuit a switching frequency of 100 kHz, a ripple current of 875 mA, a maximum duty cycle of 0.
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SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 APPLICATION INFORMATION Conduction loss is calculated as the product of the RDS(on) of the switch (at the worst case junction temperature) and the square of RMS current: P COND +R DS(on) K I2 RMS where K is the temperature factor found in the manufacturer’s RDS(on) vs. junction temperature curves.
PAGE 10
SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 APPLICATION INFORMATION multiplier (continued) The IIAC signal is obtained through a high-value resistor connected between the rectified ac line and the IAC pin of the UCC3817/18. This resistor (RIAC) is sized to give the maximum IIAC current at high line. For the UCC3817/18 the maximum IIAC current is about 500 µA. A higher current than this can drive the multiplier out of its linear range.
PAGE 11
SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 APPLICATION INFORMATION multiplier (continued) IMOUT(max) for this design is approximately 315 µA. The RMOUT resistor can then be determined by: R MOUT + V I RSENSE MOUT(max) In this example VRSENSE was selected to give a dynamic operating range of 1.25 V, which gives an RMOUT of roughly 3.91 kΩ.
PAGE 12
SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 APPLICATION INFORMATION voltage loop (continued) C + f 1 ǒ2 p f G R VA R Ǔ IN In this example Cf equals 150 nF. Resistor Rf sets the dc gain of the error amplifier and thus determines the frequency of the pole of the error amplifier. The location of the pole can be found by setting the gain of the loop equation to one and solving for the crossover frequency.
PAGE 13
SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 APPLICATION INFORMATION current loop (continued) RI is the RMOUT resistor, previously calculated to be 3.9 kΩ. (refer to Figure 3). The gain of the current amplifier is Rf/RI, so multiplying RI by GEA gives the value of Rf, in this case approximately 12 kΩ. Setting a zero at the crossover frequency and a pole at half the switching frequency completes the current loop compensation.
PAGE 14
SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 APPLICATION INFORMATION start up The UCC3818 version of the device is intended to have VCC connected to a 12-V supply voltage. The UCC3817 has an internal shunt regulator enabling the device to be powered from bootstrap circuitry as shown in the typical application circuit of Figure 1. The current drawn by the UCC3817 during undervoltage lockout, or start-up current, is typically 150 µA.
PAGE 15
SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 APPLICATION INFORMATION capacitor ripple reduction (continued) UDG-97131 Figure 6. Timing Waveforms for Synchronization Scheme Table 1. Effects of Synchronization on Boost Capacitor Current VIN = 85 V D1/Q2 VIN = 120 V D1/Q2 Q1/Q2 VIN = 240 V D1/Q2 D(Q2) Q1/Q2 Q1/Q2 0.35 1.491 A 0.835 A 1.341 A 0.663 A 1.024 A 0.731 A 0.45 1.432 A 0.93 A 1.276 A 0.664 A 0.897 A 0.
PAGE 16
SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 APPLICATION INFORMATION capacitor ripple reduction (continued) Gate Drive From Down Stream PWM C1 UCC3817 D2 CT CT RT D1 RT Figure 7. Synchronizing the UCC3817 to a Down-Stream Converter REFERENCE VOLTAGE vs REFERENCE CURRENT REFERENCE VOLTAGE vs SUPPLY VOLTAGE 7.510 VREF − Reference Voltage − V VREF − Reference Voltage − V 7.60 7.55 7.50 7.45 7.505 7.500 7.495 7.490 7.
PAGE 17
SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009 APPLICATION INFORMATION MULTIPLIER OUTPUT CURRENT vs VOLTAGE ERROR AMPLIFIER OUTPUT MULTIPLIER GAIN vs VOLTAGE ERROR AMPLIFIER OUTPUT 1.5 IAC = 150 µA VFF = 1.4 V 300 1.3 IAC = 150 µ A 250 200 Multiplier Gain − K IMOUT - Multiplier Output Current − µA 350 IAC = 300 µA VFF = 3.0 V 150 100 1.1 0.9 IAC = 300 µ A IAC = 500 µ A 0.7 50 IAC = 500 µA VFF = 4.7 V 0 0.0 1.0 2.0 3.0 4.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing UCC2817DTR SOIC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) D 16 2500 330.0 16.4 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 6.5 10.3 2.1 8.0 16.0 Q1 UCC2818DTR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 UCC2818DWTR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) UCC2817DTR SOIC D 16 2500 333.2 345.9 28.6 UCC2818DTR SOIC D 16 2500 333.2 345.9 28.6 UCC2818DWTR SOIC DW 16 2000 367.0 367.0 38.0 UCC3817DTR SOIC D 16 2500 333.2 345.9 28.6 UCC3817DWTR SOIC DW 16 2000 367.0 367.0 38.0 UCC3818DTR SOIC D 16 2500 333.2 345.9 28.
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