Datasheet

Register Descriptions
RAIL
UCD9080
SLVS692E – SEPTEMBER 2006 – REVISED MAY 2008 ................................................................................................................................................... www.ti.com
REGISTER NAME ADDRESS ACCESS ADJUSTMENT AFTER ACCESS
WDATA1 0x32 rw +1 (0x33)
WDATA2 0x33 rw – 1 (0x32)
The following are the detailed descriptions of each of the UCD9080 I
2
C registers.
The following register bit conventions are used. Each register is shown with a key indicating the accessibility of
each bit, and the initial condition after device initialization.
KEY ACCESS
rw Read/write
r Read-only
r0 Read as 0
r1 Read as 1
w Write-only
w0 Write as 0
w1 Write as 1
rc Read clears bit after read
rs Read sets bit after read
-0, -1 Condition after initialization
For each of eight voltage rails, the UCD9080 has two registers that contain the rolling average voltage for the
associated rail as measured by the device. This average voltage is maintained in real-time by the UCD9080 and
is calculated as the output of a 4-TAP FIR filter. There are two registers for each voltage rail. One holds the
least-significant 8 bits of the voltage and the other the most-significant 2 bits of the voltage. This is shown in the
following table.
Register Name Address Register Contents
RAIL1H 0x00 RAIL1 voltage, bits 9:8
RAIL1L 0x01 RAIL1 voltage, bits 7:0
RAIL2H 0x02 RAIL2 voltage, bits 9:8
RAIL2L 0x03 RAIL2 voltage, bits 7:0
RAIL3H 0x04 RAIL3 voltage, bits 9:8
RAIL3L 0x05 RAIL3 voltage, bits 7:0
RAIL4H 0x06 RAIL4 voltage, bits 9:8
RAIL4L 0x07 RAIL4 voltage, bits 7:0
RAIL5H 0x08 RAIL5 voltage, bits 9:8
RAIL5L 0x09 RAIL5 voltage, bits 7:0
RAIL6H 0x0A RAIL6 voltage, bits 9:8
RAIL6L 0x0B RAIL6 voltage, bits 7:0
RAIL7H 0x0C RAIL7 voltage, bits 9:8
RAIL7L 0x0D RAIL7 voltage, bits 7:0
RAIL8H 0x0E RAIL8 voltage, bits 9:8
RAIL8L 0x0F RAIL8 voltage, bits 7:0
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