Datasheet

Input UV Lockout
Voltage Tracking
UCD9240
www.ti.com ................................................................................................................................................... SLUS766C – JULY 2008 – REVISED NOVEMBER 2008
When a voltage rail is in its idle state, the DPWM and SRE outputs are disabled, and the differential voltage on
the EAP/EAN pins are monitored by the controller. During idle the setpoint DAC is adjusted to minimize the error
voltage. If there is a pre-bias (that is, a non-zero voltage on the regulated output), then the device can begin the
start ramp from that voltage with a minimum of disturbance. This is done by calculating the duty cycle that is
required to match the measured voltage on the rail. Nominally this is calculated as Vin / Vout; however, to allow
for losses and offsets in the system, PREBIAS_GAIN and PREBIAS_OFFSET can be used for fine tuning. If the
pre-bias voltage on the output requires a smaller pulse width than the driver can deliver, as defined by the
DRIVER_MIN_PULSE PMBus command, then the start ramp is delayed until the internal ramp reference voltage
has increased to the point where the required duty cycle exceeds the specified minimum duty.
Once a soft start/stop ramp has begun, the output is controlled by adjusting the setpoint DAC at a fixed rate and
allowing the digital compensator control engine to generate a duty cycle based on the error. The setpoint DAC
adjustments are made at a rate of 10 kHz and are based on the TON_RISE or TOFF_FALL PMBus configuration
parameters.
Although the presence of a pre-bias voltage or a specified minimum DPWM pulse width affects the time when
the DPWM and SRE signals become active, the time from when the controller starts processing the turn-on
command to the time when it reaches regulation is TON_DELAY plus TON_RISE, regardless of the pre-bias or
minimum duty cycle.
During a normal ramp (i.e. no tracking, no current limiting events and no EADC saturation), the setpoint slews at
a pre-calculated rate based on the commanded output voltage and TON_RISE. Under closed loop control, the
compensator follows this ramp up to the regulation point.
Because the EADC in the controller has a limited range, it may saturate due to a large transient during a
start/stop ramp. If this occurs, the controller overrides the calculated setpoint ramp value, and adjusts the
reference DAC in the direction to minimize the error. It continues to step the reference DAC in this direction until
the EADC comes out of saturation. Once it is out of saturation, the start ramp continues, but from this new
setpoint voltage; and therefore, has an impact on the ramp time.
The normal operation supply lock-out voltage thresholds are configured with the VIN_ON and VIN_OFF
commands. When input supply voltage drops below the value set by VIN_OFF, the device starts a normal soft
stop ramp. When the input supply voltage drops below the voltage set by VIN_UV_FAULT_LIMIT, the device
performs per the configuration using the VIN_UV_FAULT_RESPONSE command. For example, when the bias
supply for the controller is derived from another source, the response code can be set to "Continue" or "Continue
with delay," and the controller attempts to finish the soft stop ramp. If the bias voltages for the controller and gate
driver are uncertain below some voltage, the user can set the UV fault limit to that voltage and specify the
response code to be "shut down immediately" disabling all DPWM and SRE outputs. If VIN_OFF sets the voltage
at which the output voltage soft-stop ramp is initiated, and VIN_UV_FAULT_LIMIT sets the voltage where power
conversion is stopped.
Each voltage rail can be configured to operate in a tracking mode. When a voltage rail is configured to track
another voltage rail, it adjusts the setpoint to follow the master, which can be either another internal rail or the
external Vtrack pin. As in standard non-tracking mode, a target Vout is still specified for the voltage rail. If the
tracking input exceeds this target, the tracking voltage rail stops following the master signal, switch to regulation
gains, and regulate at the target voltage. When the tracking input drops back below the target (with 20 mV of
hysteresis), tracking gains is re-loaded, and the voltage rail follows the tracking reference. Note that the target
can be set above the range of the tracking input, forcing the voltage rail to always remain in tracking mode.
During tracking, the setpoint DAC is permitted to change only as fast as is possible without inducing the EADC to
saturate. This limit may be reached if the master ramps at an extremely fast rate, or if the master is at a
significantly different voltage when the rail is turned on. As in normal regulation, a current limit (current foldback)
or the detection of the EADC saturating forces the rail to temporarily deviate from the tracking reference.
The PMBus command TRACKING_SOURCE is available to enable tracking mode and select the master to track.
The tracking mode is set individually for each rail, allowing each rail to have a different master, multiple rails to
share a master, or some rails to track while others remain independent. Additionally,
TRACKING_SCALE_MONITOR permits tracking at voltage with a fixed ratio to a master voltage. For example, a
ratio of 0.5 causes the rail to regulate at one half of the master ’ s voltage.
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 25
Product Folder Link(s): UCD9240