Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- DESCRIPTION
- ELECTRICAL SPECIFICATIONS
- ABSOLUTE MAXIMUM RATINGS
- RECOMMENDED OPERATING CONDITIONS
- ELECTRICAL CHARACTERISTICS
- ADC MONITORING INTERVALS AND RESPONSE TIMES
- HARDWARE FAULT DETECTION LATENCY
- PMBus/SMBus/I2C
- I2C/SMBus/PMBus Timing Characteristics
- FUNCTIONAL OVERVIEW
- PMBus Interface
- Resistor Programmed PMBus Address Decode
- JTAG Interface
- Bias Supply Generator (Series Regulator Controller)
- Power On Reset
- External Reset
- Output Voltage Adjustment
- Analog Front End (AFE)
- Digital Compensator
- DPWM Engine
- Flexible Rail/Power Stage Configuration
- DPWM Phase Distribution
- DPWM Synchronization
- Phase Shedding at Light Current Load
- Phase Adding at Normal Current Load
- Output Current Measurment
- Output Current Balancing
- Overcurrent Detection
- Current Foldback Mode
- Input Voltage and Current Monitoring
- Temperature Monitoring
- Temperature Balancing
- Soft Start, Soft Stop Ramp Sequence
- Input UV Lockout
- Voltage Tracking
- Sequencing
- Fan Control
- Non-volatile Memory Error Correction Coding
- APPLICATION INFORMATION
UCD9240
www.ti.com
................................................................................................................................................... SLUS766C – JULY 2008 – REVISED NOVEMBER 2008
The coefficients of the filter sections are generated through modeling the power stage and load in the Power+
Designer tool. Several banks of filter coefficients can be downloaded to the device that can automatically switch
them based on the power stage operation.
Figure 1. I
2
C/SMBus/PMBus Timing in Extended Mode Diagram
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Product Folder Link(s): UCD9240