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XILINXPWR-082 EVM (HPA-082 board)

SWIFT

(TPS54xxx series) DC/DC Converter-based Power Management Solution

Providing I

CCINT

=6A from V

=5V

SUPPORTS:

Virtex-II Pro

Design 2 (PR220) - http://www-s.ti.com/sc/techlit/slva181.pdf

Spartan

-3 Design 4 (PR216) - http://www-s.ti.com/sc/techlit/slva177.pdf

o Requires resistor R7 be changed to 28.7kΩ to generate V

CCINT

=1.2V

o RocketIO linear regulators (U4-U7) are not needed

Virtex

-II Design 2 (PR219) - http://www-s.ti.com/sc/techlit/slva180.pdf

o Requires linear regulator U2 be changed to TPS79433 to provide V

CCAUX

o RocketIO linear regulators (U4-U7) are not needed

FEATURES:

High efficiency minimizes heat

Interchange SWIFT

device to support 1.5 A to 9 A load currents

o 1.5A and 3A synchronous SWIFT devices are pin-pin compatible

o 6A, 8A, and 9A synchronous SWIFT devices are pin-pin compatible

Use of the TPS54x10 adjustable devices allow

o use of smallest inductor and/or specific type of output capacitor

o flexibility to re-compensate as needed, depending on the

bypass/decoupling capacitors used with the FPGA

In-rush current (for charging decoupling caps and FPGA start-up) that places a

demand on the input power supply is minimized by the use of optional

o Integrated soft-start configured with an capacitor to provide 10 ms rise

time for V

CCINT

and V

CCO

o Sequencing of V

CCINT

, V

CCAUX

, then V

CCO

using

PWRGD and ENABLE

High UVLO trip point and integrated soft-start of the SWIFT

devices

eliminates the need for an external Supply Voltage Supervisor (SVS) to monitor

the input rail.

RocketIO™ powered by ultra-low noise, high PSRR (for rejecting noise at the

input, preventing it from translating to the output) low dropout linear regulators

(LDOs), TPS79xxx and TPS786xx. This series has been qualified by Xilinx to

replace LT1963.

Additional V

CCO

rails easily added and sequenced (if desired) using the TPS54xxx

PWRGD and ENABLE.

The design meets Xilinx’s V

CCINT

and V

CCO

start-up profile requirements, where

applicable, including monotonic voltage ramp, in-rush current and power voltage

ramp time requirements.

Summary of content (8 pages)

PAGE 1
TM SWIFT XILINXPWR-082 EVM (HPA-082 board) (TPS54xxx series) DC/DC Converter-based Power Management Solution Providing I CCINT =6A from VIN=5V SUPPORTS: - Virtex-II ProT M Design 2 (PR220) - http://www-s.ti.com/sc/techlit/slva181.pdf - SpartanT M-3 Design 4 (PR216) - http://www-s.ti.com/sc/techlit/slva177.pdf o Requires resistor R7 be changed to 28.7kΩ to generate VCCINT =1.2V o RocketIO linear regulators (U4-U7) are not needed - VirtexT M-II Design 2 (PR219) - http://www-s.ti.
PAGE 2
IMPORTANT WEB LINKS: - Link to the TI home page for Xilinx FPGA power management solutions at http://www.ti.com/xilinxfpga for more information and other reference designs. Link to datasheets at http://focus.ti.com/lit/ds/symlink/TPS54610.pdf and http://focus.ti.com/lit/ds/symlink/tps79425.pdf. Link to SWIFTTM design software tool at http://focus.ti.com/docs/toolsw/folders/print/swift-sw.html to assist further optimization/customization of design.
PAGE 3
o Adapt for VIN = 3.3 V by omitting U3. QUESTIONS? - Send an email to fpgasupport@list.ti.
PAGE 4
+ + + +
PAGE 5
PAGE 6
Filename: HPA082A_bom.xls Date: 06/14/2004 HPA082A BOM COUNT RefDes C1, C5 2 C11, C12 2 C13, C14 2 C15, C17 2 C16, C18 2 C19, C20 2 C2, C4 2 C23, C24 2 C29, C30, C31, C32 0 C3, C8, C21, C22 4 C6 1 C7 1 4 2 3 1 2 3 1 1 4 C9, C10, C25, C26, C27, C28, C33, C34, C35, C36 J1 - J8 L1, L2 R1, R2, R9 R10, R11, R16, R17 R12, R13 R3, R14, R15 R4 R5, R6 R7, R18, R19 R8 S1 TB1 - TB4 1 U1 10 8 2 3 DESCRIPTION Capacitor, Ceramic, 10-uF, 6.3-V, X5R, 10% Capacitor, Ceramic, 0.
PAGE 7
2 U2, U3 2 U4, U5 2 1 U6, U7 -- Notes: IC, IFET Power controller, Adj-V, 6-A IC, LDO Linear Regulator Ultralow-Noise High PSRR Fast RF, 500mA, 2.5V IC, Utralow-Noise, High PSRR, Fast RF 250 mA, LDO Linear Regulators, Adj-V PCB, 3.6 In x 3.25 In x .062 In PWP28 TI TPS54610PWP SOT223-6 TI TPS79425DCQ TI Any TPS79401DGN HPA082 MSOP-8 1. These assemblies are ESD sensitive, ESD precautions shall be observed. 2. These assemblies must be clean and free from flux and all contaminants.
PAGE 8
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