User's Manual

SPRZ153

TMS320C6201 Silicon Errata

5 Silicon Revision 2.1 Known Design Exceptions to Functional Specifications

EMIF: CE Space Crossing on Continuous Request Not Allowed

Advisory 2.1.1

Revision(s) Affected: 2.1 and 2.0

Details: Any continuous request of the EMIF cannot cross CE address space boundaries. This condition

can result in bad data read, or writing to the wrong CE. (Internal Reference Numbers 2600 and

3421)

Workaround: CPU Program Fetch: The simplest fix is for all external program to reside within a single CE

space. Alternatively, program fetch flow should not occur across CE spaces. This can be

accomplished by branching on-chip between executing from one CE to another CE.

DMA: All DMA block transfers without read or write synchronization should have all EMIF

addresses within a frame to belong to one CE space. In other words, all read (src) addresses

should belong to one CE space and should not cross CE boundaries. The same applies to

write (dst) addresses within a frame. Note that the source can be in the same CE space or

different CE space as the destination. DMA transfers with read and/or write synchronization

together with CE boundaries crossed between frames are not affected by this bug.

CPU Data Access: External CPU data accesses cannot perform continuous requests and thus

are not affected by this bug.

EMIF: SDRAM Invalid Access

Advisory 2.1.2

Revision(s) Affected: 2.1 and 2.0

Details: An invalid SDRAM access occurs when all of the following are true:

• Two or more SDRAM devices in different CE spaces

• Each SDRAM device has a page activate

• One active page is in bank 0 and the other in bank 1

• Each CE space with SDRAM is accessed (alternating) without a page miss or refresh

occurring (no Deactivate command).

• Two or more SDRAM devices in different CE spaces

• A trickle refresh deactivates both devices

• Before refresh occurs, a request to access one CE space comes in. The refresh will

wait until the first requester has completed.

• If request to second CE space occurs before refresh occurs, then an invalid access

takes place, since the controller neglects the fact that this space was deactivated.

(Internal Reference Numbers 4139, 0335, and 0871)