E ! "" # $ % User’s Guide March 2004 Digital Audio and Video Products SLEU052
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use.
EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range of xxx V and the output voltage range of xxx V and xxx V. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Notational Conventions Preface About This Manual This manual describes the operation of the TAS5066-5111D6EVM evaluation module from Texas Instruments. How to Use This Manual This document contains the following chapters: - Chapter 1 — Overview - Chapter 2 — System Interfaces - Chapter 3 — Protection Information about Cautions and Warnings This document may contain cautions and warnings. This is an example of a caution statement.
Trademarks Related Documentation from Texas Instruments The following table contains a list of data manuals that have detailed descriptions of the integrated circuits used in the design of the TAS5066−5111D6EVM. The data manuals can be obtained at the URL http://www.ti.com.
Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1.1 TAS5066-5111D6EVM Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 PCB Key Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 2 System Interfaces . . . . . . . . . . . . . . . . . . . . . .
Contents 1−1 1−2 2−1 2−2 2−3 2−4 Complete PurePath Digital System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Physical Structure for the TAS5066-5111D6EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Recommended Power-Up Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . J901 and J903 Pin Numbers (PCB Connector Top View) . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1 The TAS5066−5111D6EVM PurePath Digitalt customer evaluation module demonstrates two integrated circuits TAS5066 and TAS5111DAD from Texas Instruments (TI). The TAS5066 is a high-performance 24-bit six-channel digital pulse width modulator (PWM) based on EquibitTM technology. The TAS5066 has a wide variety of serial input (I@S) options including right justified, left justified, and DSP data formats. It accepts I@S data with sample rates up to 192 kHz.
TAS5066-5111D6EVM Features 1.1 TAS5066-5111D6EVM Features - 6-channel PurePath Digitalt evaluation module - Self-contained protection system (short circuit and thermal) - Standard I2S and I2C/control connector for TI input board - Double-sided plated-through PCB layout Figure 1−1.
PCB Key Map 1.2 PCB Key Map The physical structure for the TAS5066−5111D6EVM is illustrated in the following figure. J903 H-Bridge PSU J400 J500 J600 OUTPUT STAGE OUTPUT STAGE OUTPUT STAGE OUTPUT STAGE OUTPUT STAGE OUTPUT STAGE J901 CHANNEL 6 J300 PSU IINTERFACE J100 CHANNEL 5 CHANNEL 3 J200 J902 PSU CONTROL CHANNEL 4 CHANNEL 2 CHANNEL 1 Figure 1−2.
1-4
Chapter 2 This chapter describes the TAS5066−5111D6EVM board in regards to power supply (PSU) and system interfaces. Topic Page 2.1 PSU Interface (J901) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.2 PSU Control Interface (J902) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4 2.3 Loudspeaker Connectors (J100 − J600) . . . . . . . . . . . . . . . . . . . . . . . . . 2-5 2.4 Control Interface (J50) . . . . . .
PSU Interface (J901) 2.1 PSU Interface (J901) The TAS5066−5111D6EVM module must be powered from one or two external regulated power supplies. High audio performance requires a stabilized output stage power supply with low ripple voltage and low output impedance. Note: The length of power supply cable must be minimized. Increasing length of PSU cable is equal to increasing the distortion for the amplifier at high output levels and low frequencies.
PSU Interface (J901) Figure 2−2. J901 and J903 Pin Numbers (PCB Connector Top View) 4 3 2 1 Table 2−2. J901 Pin Description Pin Number Net-Name at Schematics 1 V-HBRIDGE Description 2 − 3 GND Ground 4 GND Ground Output stage power supply System power supply Table 2−3.
PSU Control Interface (J902) 2.2 PSU Control Interface (J902) This interface is used for on-board sensing of output supply voltage and for power supply volume control (PSCV) signal. Figure 2−3. J902 Pin Numbers (PCB Connector Top View) 5 4 3 2 1 Table 2−4.
Loudspeaker Connectors (J100 − J600) 2.3 Loudspeaker Connectors (J100 − J600) Both positive and negative speaker outputs are floating and may not be connected to ground (e.g., through an oscilloscope). Figure 2−4. J100 − J600 Pin Numbers (PCB Connector Top View) 2 1 Table 2−5.
Control Interface (J50) 2.4 Control Interface (J50) This interface connects the TAS5066-5111D6EVM board to a TI input board. Table 2−6. J50 Pin Description Pin Number Net-Name at Schematics 1 GND Ground 2 PSVC Power supply volume control from (mC) input board 3 GND Ground 4 RESET 5 ERR-RCVY 6 MUTE Ramp volume from any setting to noiseless soft mute. Mute can also be activated by I2C. 7 PDN Power down. TAS5066 enters the power down state when activated.
Digital Audio Interface (J51) 2.5 Digital Audio Interface (J51) The digital audio interface contains digital audio signal data (I2S), clocks etc. Please see the TAS5066 data manual for signal timing and details not explained in this document. Table 2−7. J51 Pin Description Pin Number Net-Name at Schematics Description 1 GND Ground 2 MCLK Master clock input. Low jitter system clock for PWM generation and reclocking. Ground connection from source to TAS5066 must be a low impedance connection.
PWM Timing, Interchannel Delay Registers 2.6 PWM Timing, Interchannel Delay Registers For maximum performance, the PWM timing must be optimized for the specific configuration and PCB layout. The default values in TAS5066 is properly not optimal in many designs and therefore the interchannel delays must be programmed by I2C to the TAS5066 at startup and after every system reset. Table 2−9.
Chapter 3 This chapter describes the short circuit protection and fault reporting circuitry of the TAS5111 device. Topic Page 3.1 Short Circuit Protection and Fault Reporting Circuitry . . . . . . . . . . . 3-2 3.2 Device Fault Reporting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Short Circuit Protection and Fault Reporting Circuitry 3.1 Short Circuit Protection and Fault Reporting Circuitry TAS5111 is a self-protecting device that provides device fault reporting (including high-temperature protection and short circuit protection). TAS5111 is configured in back-end auto-recovery mode and therefore resets automatically after all errors (M1, M2 and M3 is set low).
