User's Manual

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PRODUCT PREVIEW
HCS
HAS
HCNTL[1:0]
HR/W
HHWIL
HSTROBE
(A)
HD[15:0]
HRDY
(B)
5
34
17
18
13
10
12
9
37
12
12
11
11
11
17
18
14
11
11
11
37
10
9
13
12
12
12
5
34
38
35
36
TMS320C6454
Fixed-Point Digital Signal Processor
SPRS311A – APRIL 2006 – REVISED DECEMBER 2006
A. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT( HDS1 XOR HDS2)] OR HCS.
B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with
auto-incrementing) and the state of the FIFO, transitions on HRDY may or may not occur. For more detailed
information on the HPI peripheral, see the TMS320C645x DSP Host Port Interface (HPI) User's Guide (literature
number SPRU969 ).
Figure 7-47. HPI16 Write Timing ( HAS Used)
C64x+ Peripheral Information and Electrical Specifications172 Submit Documentation Feedback