User's Manual

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PRODUCT PREVIEW
7 C64x+ Peripheral Information and Electrical Specifications
7.1 Parameter Information
Transmission Line
4.0 pF 1.85 pF
Z0 = 50 Ω
(see Note)
Tester Pin Electronics
Data Sheet Timing Reference Point
Output
Under
Test
NOTE: The data sheet provides timing at the device pin. For output timing analysis, the tester pin electronics and its transmission line effects must
be taken into account. A transmission line with a delay of 2 ns can be used to produce the desired transmission line effect. The transmission
line is intended as a load only. It is not necessary to add or subtract the transmission line delay (2 ns) from the data sheet timings.
Input requirements in this data sheet are tested with an input slew rate of < 4 Volts per nanosecond (4 V/ns) at the device pin.
42 Ω 3.5 nH
Device Pin
(see Note)
7.1.1 3.3-V Signal Transition Levels
V
ref
= 1.5 V
V
ref
= V
IL
MAX (or V
OL
MAX)
V
ref
= V
IH
MIN (or V
OH
MIN)
7.1.2 3.3-V Signal Transition Rates
TMS320C6454
Fixed-Point Digital Signal Processor
SPRS311A – APRIL 2006 – REVISED DECEMBER 2006
Figure 7-1. Test Load Circuit for AC Timing Measurements
The load capacitance value stated is only for characterization and measurement of AC timing signals. This
load capacitance value does not indicate the maximum load the device is capable of driving.
All input and output timing parameters are referenced to 1.5 V for both "0" and "1" logic levels.
Figure 7-2. Input and Output Voltage Reference Levels for AC Timing Measurements
All rise and fall transition timing parameters are referenced to V
IL
MAX and V
IH
MIN for input clocks,
V
OL
MAX and V
OH
MIN for output clocks.
Figure 7-3. Rise and Fall Transition Time Voltage Reference Levels
All timings are tested with an input edge rate of 4 volts per nanosecond (4 V/ns).
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