User's Manual

4.51 Interrupt Register for Common USB Interrupts (INTRUSB)
www.ti.com Registers
The Interrupt Register for Common USB Interrupts (INTRUSB) is shown in Figure 66 and described in
Table 67 . Reading this register causes all bits to be cleared.
Note: Unless the UINT bit of CTRLR is set, do not read or write this register directly. Use the
INTSRCR register instead.
Figure 66. Interrupt Register for Common USB Interrupts (INTRUSB)
7 6 5 4 3 2 1 0
VBUSERR SESSREQ DISCON CONN SOF RESET_BABBLE RESUME SUSPEND
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
LEGEND: R = Read only; - n = value after reset
Table 67. Interrupt Register for Common USB Interrupts (INTRUSB) Field Descriptions
Bit Field Value Description
7 VBUSERR 0-1 Set when VBus drops below the VBus valid threshold during a session. Only valid when the USB
controller is 'A' device. All active interrupts will be cleared when this register is read.
6 SESSREQ 0-1 Set when session request signaling has been detected. Only valid when USB controller is 'A' device.
5 DISCON 0-1 Set in host mode when a device disconnect is detected. Set in peripheral mode when a session
ends.
4 CONN 0-1 Set when a device connection is detected. Only valid in host mode.
3 SOF 0-1 Set when a new frame starts.
2 RESET_BABBLE 0-1 Set in peripheral mode when reset signaling is detected on the bus set in host mode when babble is
detected.
1 RESUME 0-1 Set when resume signaling is detected on the bus while the USB controller is in suspend mode.
0 SUSPEND 0-1 Set when suspend signaling is detected on the bus only valid in peripheral mode.
SPRUGH3 – November 2008 Universal Serial Bus (USB) Controller 115
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