User's Manual

5.1.2 A Priori Data
5.2 Output Data Format
Shared-Processing (SP) Mode www.ti.com
Figure 28. EN = 0 (Big-Endian Mode) Rate = 1/5
Word Word
N N + 1
SP4 SP3 SP2 SP1 SP0 SP9 SP8 SP7 SP6 SP5
B0' A0' B0 A0 X0 B1' A1' B1 A1 X1
Word Word
N + 2 N + 3
SP4 SP3 SP2 SP1 SP0 SP9 SP8 SP7 SP6 SP5
B2' A2 B2 A2 X2 B3' A3' B3 A3 X3
Figure 29. EN = 1 (Little-Endian Mode) Rate = 3/4
Word Word
N + 1 N
SP9 SP8 SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0
0 0 0 0 X1 0 0 0 A0 X0
Word Word
N + 3 N + 2
SP9 SP8 SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0
0 A3' 0 0 X3 0 0 0 0 X2
Word Word
N + 5 N + 4
SP9 SP8 SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0
0 0 0 0 X3 0 0 0 0 X2
Figure 30. Rate 3/4 EN = 0 (Big-Endian Mode) Rate = 3/4
Word Word
N N + 1
SP4 SP3 SP2 SP1 SP0 SP9 SP8 SP7 SP6 SP5
0 0 0 A0 X0 0 0 0 0 X1
Word Word
N + 2 N + 3
SP4 SP3 SP2 SP1 SP0 SP9 SP8 SP7 SP6 SP5
0 0 0 0 X2 0 A3' 0 0 X3
Word Word
N + 4 N + 5
SP4 SP3 SP2 SP1 SP0 SP9 SP8 SP7 SP6 SP5
0 0 0 0 X4 0 0 0 0 X5
A priori data for MAP0 and MAP1 must be organized as described in Figure 31 (the base address must be
double-word aligned). For big-endian configuration, see Section 7 .
Figure 31. A Priori Data
63:62 61:56 55:50 49:44 43:38 37:32 31:30 29:24 23:18 17:12 11:6 5:0
RSVD AP4 AP3 AP2 AP1 AP0 RSVD AP9 AP8 AP7 AP6 AP5
The TCP2 delivers 32-bit word-packed extrinsic data. Each extrinsic is a (5,2) number; that is, SIIII.FF
(where S = sign bit, I = integer, F = fractional bit) and is right-justified with 0 in the most-significant-bit
position. Their destination storage base address must be double-word aligned. Moreover, the buffer length
must contain an even number of words.
TMS320C6457 Turbo-Decoder Coprocessor 224 SPRUGK1 – March 2009
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