User's Manual

6.21 TCP2 Output Parameter Register 2 (TCPOUT2)
6.22 TCP2 Execution Register (TCPEXE)
www.ti.com Registers
The TCP2 output parameter register 2 (TCPOUT2) is shown in Figure 51 and described in Table 26 .
Figure 51. TCP2 Output Parameter Register 2 (TCPOUT2)
31 16 15 0
CNT_RE_MAP1 CNT_RE_MAP0
R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; - n = value after reset
Table 26. TCP2 Output Parameter Register 2 (TCPOUT2) Field Descriptions
Bit Field Value Description
31-16 CNT_RE_MAP1 Number of MAP1 re-encode errors
15-0 CNT_RE_MAP0 Number of MAP0 re-encode errors
The TCP2 execution register (TCPEXE) is shown in Figure 52 and described in Table 27 .
Figure 52. TCP2 Execution Register (TCPEXE)
31 16
Reserved
W-0
15 3 2 0
Reserved EXECUTION_INSTR
W-0 W-0
LEGEND: R/W = Read/Write; R = Read only; W = Write only; - n = value after reset
Table 27. TCP2 Execution Register (TCPEXE) Field Descriptions
Bit Field Value Description
31-3 Reserved 0 Reserved. The reserved bit location is always read as 0. A value written to this field has no
effect.
2-0 EXECUTION_INSTR Execution commands of TCP.
0 No instruction
1 Start TCP
4 Debug mode. Normal initialization and wait in MAP state 0.
5 Debug mode. Execute one MAP decode and wait in MAP state 6.
6 Debug mode. Execute remaining MAP decodes and complete normal ending.
7 SOFT RESET. Soft reset all TCP registers except for the execution register and endian
register.
SPRUGK1 – March 2009 TMS320C6457 Turbo-Decoder Coprocessor 2 43
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