Product Card
Table Of Contents
- Contents
- Tables
- Figures
- 0 Document History
- 1 Introduction
- 2 Product Concept
- 3 Application Connector Interface
- 3.1 Pin Assignments and Electrical Description
- 3.2 Characteristics
- 3.2.1 Power Supply and Ground
- 3.2.2 Control Signals
- 3.2.3 Tunable Antenna Interface
- 3.2.4 WWAN/WiFi Coexistence Control
- 3.2.5 Dynamic Power Reduction
- 3.2.6 USB Interface
- 3.2.7 PCI Express® Interface
- 3.2.8 SIM/UICC Interface
- 3.2.9 eUICC Interface
- 3.2.10 GPIO Interface
- 3.2.11 Status
- 3.2.12 Add-in Card Configuration Pins
- 4 Antenna Interface
- 5 Operation
- 6 Appendix
Cinterion
®
MV31-W Hardware Interface Description
5.5 Timing Sequence Requirement
75
t MV31-W_HID_v01.009a 2022-04-27
Public / Preliminary
Page 55 of 76
Figure 27: Power on timing diagram
Table 23: Power On information
Symbol Minimum value Note
tPr 10ms Keep 3.3V power supply before Full_Card_Power_Off# assert.
There is no tPr if the power supply is always ready.
ton1 150µs Keep PCIe_CLK stable before PERST# is inactive.
ton2 150ms PERST# should be deasserted after a Full_Card_Power_Off#
tPr
ton1
ton2
VBAT_3.3V
Full_Card_Power Off#
PECLK
PERST#