User Manual

Table Of Contents
Settings (FOR INTERNAL USE)
99-137719-D Confidential - For internal use 6-79
6666
Startup & configuration
6.12.1.11 S-Band SSR Generator
Below parameter can be used to simulate 2. harmonic SSR reply interference detected
and muted by S-Band antenna.
.butts.ref_clk.cal_request r/w t4 §4 int / ram [0, 1] 0=ready/finished
1=ongoing calibration
.butts.ref_clk.cal_status r int / ram [0..2] 0=ready/finished
1=ongoing
2=timeout
Note
If .butts.ref_clk.cal_status returns the value timeout, it is usually a consequence of
either a wrong setting of fpga.debug_mux (must be set to 13=BUTTS), or that no
proper 10 MHz external reference clock signal has been applied to the RM.
Parameter name
protocols.bgan.set
External
access
Type /
Domain
Values
[min;max]
Comment
Table 6-97: Configuration parameter: BUTTS settings
Parameter name
protocols.bgan.set.ssr_generator
External
access
Type /
Domain
Values
[min;max]
Comment
.profile r/w t3 §4 int / ram [0..4] Number of
exponential
distributed SSR
replies per second:
0: Off (default)
1: 200 Mode-AC, 50
Mode-S (short), 16
Mode-S (long).
2: 700 Mode-AC, 110
Mode-S (short), 54
Mode-S (long)
3: 1200 Mode-AC, 50
Mode-S (short), 16
Mode-S (long)
4: 353 Mode-AC, 41
Mode-S (short), 20
Mode-S (long)
Table 6-98: S-Band SSR generator configuration