Data Sheet

THUNDERCOMM TurboX™ C40x SoM Datasheet
31
Dedicated PMIC circuits continuously monitor events that might trigger a power-on sequence. If an event occurs,
these circuits power on the IC, determine the device’s available power sources, enable the correct source.
There are two events that will be triggered.
When insert battery or other power supply and pull down KPDPWR_N to ground, SoM will be power on
automatically. It is longer than 1s with pressing power-on key, for power on event. And it is suggested for 3s
powering on system.
Other power on event, when pull up PON_1 pin to power, it is high-level triggered with a valid trigger range
between 1.17 V to VPH_PWR, and insert battery or power supply，SoM will be power on automatically.
Figure 3-3 Power on signal
Power on Interface
Pin Name
PIN Location
Voltage
Type
Description
Notes
KPDPWR_N
C6
V_INT
DI
Power-on trigger, level trigger (active low)
PON_1
C1
1.17V - 4.2V
DI
Level-high triggered power-on input
Table 3-13 Power on interface definition
3.3.13 Reset Interface
Three stage reset and external resets.
⚫ Stage 1 reset – software-configurable bark
PMIC generates interrupt, giving the SoC device the opportunity to fix the problem or gracefully reset the
system. Example events that can cause a bark: Over temperature indicates system is getting too hot. PMIC
watchdog indicates that it has not kicked.
⚫ Stage 2 –software-configurable bite
If reset is ignored, PMIC will force a reset event (selectable by software).
⚫ Stage 3 –hardware mandatory bite
The user can generate a mandatory reset by a long key press of KYPD_PWR to resets PMIC back to factory
default.
C40x SoM
PON_1
KPDPWR_N
1.17V - 4.2V