Users Manual
Table Of Contents
- 2Functional Overview
- 3Interfaces Description
- 3.1Interfaces Parameter Definitions
- 3.2Interfaces Detail Description
- 3.2.1Power Supply Interface
- 3.2.2Touchscreen Interface
- 3.2.3Display Interface
- 3.2.4Camera Interfaces
- 3.2.5Audio Interface
- 3.2.6USB & DisplayPort Interface
- 3.2.7 PCIe Interface
- 3.2.8 SSC Interface
- 3.2.9 SDIO Interface
- 3.2.10 QUP Interface
- 3.2.11Power on Interface
- 3.2.12Reset Interface
- 3.2.13 Keys Interface
- 3.2.14 Sensor Interrupt Interface
- 3.2.15Debug UART Interface
- 3.2.16Battery Interface
- 3.2.17ADCs Interface
- 3.2.18 PWMs and LED Current Driver Interface
- 3.2.19Antenna Interface
- 4Connector PIN Summary
- 5Electrical Characteristics
Thundercomm TurboX D845 System on Module
Copyright © 2018 All Rights Reserved , Thundercomm Technology Co., Ltd.
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mode. Supports 16-bit and 24-bit data formats in standard I2S mode, and 24-bit left-justified (24-bit data in
32-bit frame left-justified, LSBs are padded with 0s).
Maximum clock frequency supported 12.288 MHz.
An additional pin can be used for a master clock, supplied by the MSM device, the master clock is often used
in the external devices to drive their oversampling logic. The LPASS clock controller can provide master
clocks from independent clock dividers to the I2S bit-clock dividers.
Applicable standard Feature exceptions
Philips I2S Bus Specifications revised June 5, 1996 None
Table 5.11- 1 I2S
Figure 5.11- 1 I2S timing diagram
The word-select signal is a 50% duty cycle signal. Data is delayed 1 bit-clock, relative to the word select.