Data Sheet

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Tibbit Module

#08

M1S

Wiegand and clock/data reader port

Wiegand and clock/data reader port plus one open collector output.

LINE A

LINE B

LINE C

LINE D

CPU

IO 1

IO 2

IO 3

IO 4

DECODER

W0&1

CONTROL

O.C.OUTPUT

CTS

LOW=ON

Form:M1S

Power:

5V - Consumes 20mA

Mates with:#19, #20, #21

Details

Our programmable devices (such as

TPP2

and

TPP3

) have the unique ability to process input from

card readers with clock/data or Wiegand interface. This is achieved through the ser. object running

in the clock/data or Wiegand mode. Tibbit #08 implements necessary hardware.

In order to be able to process card reader output, this Tibbit has to be connected to the RX and CTS

lines of the CPU's UART (see

[SER]

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/4/2019 tibbo.com/datasheets/tibbits/08.html Tibbit Module #08 Wiegand and clock/data reader port M1S Wiegand and clock/data reader port plus one open collector output. 1 IO 1 2 IO 2 3 IO 3 4 IO 4 5 6 W1 DECODER W0&1 RX CTS 12 5V 11 LINE A 10 LINE B CONTROL O.C.
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1/4/2019 tibbo.com/datasheets/tibbits/08.html When connecting a clock/data reader, wire the clock line to IO1, and the data line to IO2. Set the CONTROL line to LOW — this selects the clock/data mode for the Tibbit's hardware. When connecting a Wiegand reader, wire the W0 line to IO1, W1 line -- to IO2. Set the CONTROL line to HIGH to select the Wiegand mode. Most card readers with clock/data and Wiegand interfaces have open collector outputs. Such outputs require pull-up resistors on the receiving end.
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1/4/2019 tibbo.com/datasheets/tibbits/08.html Tibbit Module http://tibbo.com/datasheets/tibbits/08.