CF220I CompactFlash Card Features Description RoHS compliant Compliant with CF 6.0 specification with LBA48 support Single Power Supply: 3.3V±5% or 5V±10% Transcend’s CF220I is a high speed industrial Operating Temperature: -40 C to 85 C Compact Flash Card with high quality flash memory Storage Temperature: -55 C to 100 C assembled on a printed circuit board.
Ordering Information Part Number Interface Transfer Mode Disk Type Ultra DMA mode 0~5 True IDE mode Multi-Word DMA Mode 0~4 TS128M~4GCF220I Fixed Disk (Default) PIO Mode 0 ~ 6 PC Card mode (PCMCIA) 80ns, 100ns, 120ns, 250ns Fixed Disk (Default) C.H.
Performance Model P/N Read (MB/s) Write (MB/s) Random Read (MB/s) Random Write (MB/s) TS128MCF220I 39.43 8.615 10.60 0.178 TS256MCF220I 39.23 8.657 10.19 0.182 TS512MCF220I 20.79 7.637 8.139 0.338 TS1GCF220I 20.85 13.75 6.382 0.237 TS2GCF220I 20.57 22.45 6.308 1.091 TS4GCF220I 39.14 42.08 9.278 1.
Power Requirements (DC 5V, 3.3V @25℃) Current Magnitude (mA) Part Number & Input Voltage Read Write TS128MCF220I 3.3V 5% 121.3 84.1 TS256MCF220I 3.3V 5% 121.9 84.9 TS512MCF220I 3.3V 5% 87.7 70.3 TS1GCF220I 3.3V 5% 89.9 88.3 TS2GCF220I 3.3V 5% 92.1 111.0 TS4GCF220I 3.3V 5% 132.2 169.5 1. Read/Write operation is derived from IOMeter with 10MB file each operation. 2. StandBy Current : 5V : 2.8mA 3.3V : 2.2mA 3. All data above are maximum value of each measurement.
Regulations Compliance CE, FCC and BSMI
More Functions to extend product life 1. Global Wear Leveling – Advanced algorithm to enhance the Wear-Leveling Efficiency Global wear leveling ensures every block has an even erase count. By ensuring all spare blocks in the SSD’s flash chips are managed in a single pool, each block can then have an even erase count. This helps to extend the lifespan of a SSD and to provide the best possible endurance.
Transcend
Block Diagram
Pin Assignments and Pin Type
Note: 1) These signals are required only for 16 bit accesses and not required when installed in 8 bit systems. Devices should allow for 3-state signals not to consume current. 2) The signal should be grounded by the host. 3) The signal should be tied to VCC by the host. 4) The mode is required for CompactFlash Storage Cards. 5) The -CSEL signal is ignored by the card in PC Card modes. However, because it is not pulled upon the card in these modes, it should not be left floating by the host in PC Card modes.
Signal Description Signal Name Dir. A10 – A00 (PC Card Memory Mode) I Pin 8,10,11,12, These address lines along with the -REG signal are used to select the following: 14,15,16,17, The I/O port address registers within the CompactFlash Storage Card , the 18,19,20 memory mapped port address registers within the CompactFlash Storage Card, a byte in the card's information structure and its configuration control and status registers.
Signal Name Dir. Pin -CE1, -CE2 (PC Card Memory Mode) Card Enable I 7,32 Description These input signals are used both to select the card and to indicate to the card whether a byte or a word operation is being performed. -CE2 always accesses the odd byte of the word.-CE1 accesses the even byte or the Odd byte of the word depending on A0 and -CE2. A multiplexing scheme based on A0,-CE1, -CE2 allows 8 bit hosts to access all data on D0-D7.
Signal Name Dir. Pin -INPACK (PC Card Memory Mode) O 43 Description This signal is not used in this mode. The Input Acknowledge signal is asserted by the CompactFlash Storage Card when the card is selected and responding to an I/O read cycle at the address that is on the address bus. This signal is used by the host to control the enable of any input data buffers between the CompactFlash Storage Card and the CPU.
Signal Name Dir. Pin -IOWR (PC Card Memory Mode) I 35 -IOWR (PC Card I/O Mode) Description This signal is not used in this mode. The I/O Write strobe pulse is used to clock I/O data on the Card Data bus into the CompactFlash Storage Card controller registers when the CompactFlash Storage Card is configured to use the I/O interface. The clocking shall occur on the negative to positive edge of the signal (trailing edge).
Signal Name Dir. Pin -REG (PC Card Memory Mode) Attribute Memory Select I 44 Description This signal is used during Memory Cycles to distinguish between Common Memory and Register (Attribute) Memory accesses. High for Common Memory, Low for Attribute Memory. -REG (PC Card I/O Mode) The signal shall also be active (low) during I/O Cycles when the I/O address is on the Bus.
Signal Name Dir. Pin -VS1 -VS2 (PC Card Memory Mode) O 33 40 Description Voltage Sense Signals. -VS1 is grounded on the Card and sensed by the Host so that the CompactFlash Storage Card CIS can be read at 3.3 volts and -VS2 is reserved by PCMCIA for a secondary voltage and is not connected on the Card. -VS1 -VS2 (PC Card I/O Mode) This signal is the same for all modes. -VS1 -VS2 (True IDE Mode) This signal is the same for all modes.
Electrical Specification The following tables indicate all D.C. Characteristics for the CompactFlash Storage Card. Unless otherwise stated, conditions are: Vcc = 5V ±10% Vcc = 3.3V ± 5% Absolute Maximum Conditions Input Power Input Leakage Current Input Characteristics CompactFlash interface I/O at 5.0V Parameter Symbol Min. Max. Unit 5.5 V Supply Voltage VCC 4.5 High level output voltage VOH VCC-0.
Parameter Symbol Min. Max. Unit 3.63 V Supply Voltage VCC 2.97 High level output voltage VOH VCC-0.8 Low level output voltage VOL High level input voltage VIH Low level input voltage VIL Pull up resistance 2 Pull down resistance Remark V 0.8 V 2.4 V Non-schmitt trigger 2.05 V Schmitt trigger 0.6 V Non-schmitt trigger 1.25 V Schmitt trigger RPU 52.7 141 kOhm RPD 47.5 172 kOhm 1 1 The I/O pins other than CompactFlash interface Symbol Min. Max.
Output Drive Characteristics
Signal Interface
Notes: 1) Control Signals: each card shall present a load to the socket no larger than 50 pF 10 at a DC current of 700 μ A low state and 150 μ A high state, including pull-resistor. The socket shall be able to drive at least the following load 10 while meeting all AC timing requirements: (the number of sockets wired in parallel) multiplied by (50 pF with DC current 700 μ A low state and 150 μ A high state per socket). 2) Resistor is optional.
Ultra DMA Electrical Requirements Host and Card signal capacitance limits for Ultra DMA operation The host interface signal capacitance at the host connector shall be a maximum of 25 pF for each signal as measured at 1 MHz. The card interface signal capacitance at the card connector shall be a maximum of 20 pF for each signal as measured at 1 MHz.
Table: Ultra DMA Termination with Pull-up or Pull down Example Printed Circuit Board (PCB) Trace Requirements for Ultra DMA On any PCB for a host or device supporting Ultra DMA: The longest D[15:00] trace shall be no more than 0.5" longer than either STROBE trace as measured from the IC pin to the connector. The shortest D[15:00] trace shall be no more than 0.5" shorter than either STROBE trace as measured from the IC pin to the connector.
Attribute Memory Read Timing Specification
Configuration Register (Attribute Memory) Write Timing Specification
Common Memory Read Timing Specification
Common Memory Write Timing Specification
I/O Input (Read) Timing Specification I/O Output (Write) Timing Specification
True IDE PIO Mode Read/Write Timing Specification
True IDE Ultra DMA Mode Read/Write Timing Specification Table: Ultra DMA Data Burst Timing Requirements
Notes: 1) All timing measurement switching points (low to high and high to low) shall be taken at 1.5 V. 2) All signal transitions for a timing parameter shall be measured at the connector specified in the measurement location column. For example, in the case of tRFS, both STROBE and –DMARDY transitions are measured at the sender connector. 3) The parameter tCYC shall be measured at the recipient’s connector farthest from the sender.
Notes: 1) The parameters tUI, tMLI : (Ultra DMA Data-In Burst Device Termination Timing and Ultra DMA Data-In Burst Host Termination Timing), and tLI indicate sender-to-recipient or recipient-to-sender
interlocks, i.e., one agent (either sender or recipient) is waiting for the other agent to respond with a signal before proceeding. tUI is an unlimited interlock that has no maximum time value. tMLI is a limited time-out that has a defined minimum. tLI is a limited time-out that has a defined maximum. 2) 80-conductor cabling shall be required in order to meet setup (tDS, tCS) and hold (tDH, tCH) times in modes greater than 2.
Table: Ultra DMA Sender and Recipient IC Timing Requirements Note: 1) The sender shall be tested while driving an 18 inch long, 80 conductor cable with PVC insulation material. The signal under test shall be cut at a test point so that it has not trace, cable or recipient loading after the test point. All other signals should remain connected through to the recipient.
Card Configuration The CompactFlash Storage Cards is identified by appropriate information in the Card Information Structure (CIS). The following configuration registers are used to coordinate the I/O spaces and the Interrupt level of cards that are located in the system.
Attribute Memory Function Attribute memory is a space where CompactFlash Storage Card identification and configuration information are stored, and is limited to 8 bit wide accesses only at even addresses. The card configuration registers are also located here. For CompactFlash Storage Cards, the base address of the card configuration registers is 200h.
Configuration Option Register (Base + 00h in Attribute Memory)
Card Configuration and Status Register (Base + 02h in Attribute Memory)
Pin Replacement Register (Base + 04h in Attribute Memory)
Socket and Copy Register (Base + 06h in Attribute Memory)
I/O Transfer Function The I/O transfer to or from the CompactFlash Storage can be either 8 or 16 bits. When a 16 bit accessible port is addressed, the signal -IOIS16 is asserted by the CompactFlash Storage. Otherwise, the -IOIS16 signal is de-asserted. When a 16 bit transfer is attempted, and the -IOIS16 signal is not asserted by the CompactFlash Storage, the system shall generate a pair of 8 bit references to access the word‘s even byte and odd byte.
Common Memory Transfer Function The Common Memory transfer to or from the CompactFlash Storage can be either 8 or 16 bits.
True IDE Mode I/O Transfer Function The CompactFlash Storage Card can be configured in a True IDE Mode of operation. The CompactFlash Storage Card is configured in this mode only when the -OE input signal is grounded by the host during the power off to power on cycle. Optionally, CompactFlash Storage Cards may support the following optional detection methods: 1. The card is permitted to monitor the –OE (-ATA SEL) signal at any time(s) and switch to PCMCIA mode upon detecting a high level on the pin. 2.
Metaformat Overview The goal of the Metaformat is to describe the requirements and capabilities of the CompactFlash Storage Card as thoroughly as possible. This includes describing the power requirements, IO requirements, memory requirements, manufacturer information and details about the services provided. Table: Sample Device Info Tuple Information for Extended Speeds Note: The value “1” defined for D3 of the N+0 words indicates that no write-protect switch controls writing the ATA registers.
CF-ATA Drive Register Set Definition and Protocol The CompactFlash Storage Card can be configured as a high performance I/O device through: a) The standard PC-AT disk I/O address spaces 1F0h-1F7h, 3F6h-3F7h (primary) or 170h- 177h, 376h-377h (secondary) with IRQ 14 (or other available IRQ). b) Any system decoded 16 byte I/O block using any available IRQ. c) Memory space.
I/O Primary and Secondary Address Configurations Table: Primary and Secondary I/O Decoding
Contiguous I/O Mapped Addressing When the system decodes a contiguous block of I/O registers to select the CompactFlash Storage Card, the registers are accessed in the block of I/O space decoded by the system as follows: Table: Contiguous I/O Decoding
Memory Mapped Addressing When the CompactFlash Storage Card registers are accessed via memory references, the registers appear in the common memory space window: 0-2K bytes as follows: True IDE Mode Addressing When the CompactFlash Storage Card is configured in the True IDE Mode, the I/O decoding is as follows:
CF-ATA Registers The following section describes the hardware registers used by the host software to issue commands to the CompactFlash device. These registers are often collectively referred to as the “task file.” Data Register (Address - 1F0h[170h];Offset 0,8,9) The Data Register is a 16 bit register, and it is used to transfer data blocks between the CompactFlash Storage Card data buffer and the Host. This register overlaps the Error Register.
Feature Register (Address - 1F1h[171h]; Offset 1, 0Dh Write Only) This register provides information regarding features of the CompactFlash Storage Card that the host can utilize. This register is also accessed in PC Card modes on data bits D15-D8 during a write operation to Offset 0 with -CE2 low and -CE1 high.
Bit 2 (HS2): when operating in the Cylinder, Head, Sector mode, this is bit 2 of the head number. It is Bit 26 in the Logical Block Address mode. Bit 1 (HS1): when operating in the Cylinder, Head, Sector mode, this is bit 1 of the head number. It is Bit 25 in the Logical Block Address mode. Bit 0 (HS0): when operating in the Cylinder, Head, Sector mode, this is bit 0 of the head number. It is Bit 24 in the Logical Block Address mode.
Device Control Register (Address - 3F6h[376h]; Offset Eh) This register is used to control the CompactFlash Storage Card interrupt request and to issue an ATA soft reset to the card. This register can be written even if the device is BUSY. The bits are defined as follows: Bit 7: this bit is ignored by the CompactFlash Storage Card. The host software should set this bit to 0. Bit 6: this bit is ignored by the CompactFlash Storage Card. The host software should set this bit to 0.
Card (Drive) Address Register (Address 3F7h[377h]; Offset Fh) This register is provided for compatibility with the AT disk drive interface. It is recommended that this register not be mapped into the host’s I/O space because of potential conflicts on Bit 7. Bit 7: this bit is unknown. Implementation Note: Conflicts may occur on the host data bus when this bit is provided by a Floppy Disk Controller operating at the same addresses as the CompactFlash Storage Card.
CF-ATA Command Set
Request Sense - 03h
The extended error code is returned to the host in the Error Register.
Multiple without Erase command. There is no data transfer associated with this command but a Write Fault error status can occur.
Set Features – EFh Feature Supported Feature 03h 81h 82h Operation Set transfer mode based on calue in Sector Count register Disable 8 bit data transfer Disable Write Cache Execute Drive Diagnostic - 90h When the diagnostic command is issued in a PCMCIA configuration mode, this command runs only on the CompactFlash Storage Card that is addressed by the Drive/Head register.
Flush Cache – E7h This command causes the card to complete writing data from its cache. The card returns status with RDY=1 and DSC=1 after the data in the write cache buffer is written to the media. If the Compact Flash Storage Card does not support the Flush Cache command, the Compact Flash Storage Card shall return command aborted. Identify Device – ECh The Identify Device command enables the host to receive parameter information from the CompactFlash Storage Card.
Read Sector(s) - 20h or 21h Read Verify Sector(s) - 40h or 41h Set Multiple Mode - C6h Write DMA – CAh
Write Multiple Command - C5h Write Sector(s) - 30h or 31h NOP - 00h This command always fails with the CompactFlash Storage Card returning command aborted.
Read Buffer - E4h The Read Buffer command enables the host to read the current contents of the CompactFlash Storage Card’s sector buffer. This command has the same protocol as the Read Sector(s) command. Write Buffer - E8h Check Power Mode - 98h or E5h If the CompactFlash Storage Card is in, going to, or recovering from the sleep mode, the CompactFlash Storage Card sets BSY, sets the Sector Count Register to 00h, clears BSY and generates an interrupt.
This command causes the CompactFlash Storage Card to set BSY, enter the Idle mode, clear BSY and generate an interrupt. If the sector count is non-zero, it is interpreted as a timer count with each count being 5 milliseconds and the automatic power down mode is enabled. If the sector count is zero, the automatic power down mode is disabled. Note that this time base (5 msec) is different from the ATA specification.
Standby Immediate - 94h or E0h Security Set Password – F1h Table
Security Unlock – F2h Security Erase Prepare – F3h Security Erase Unit – F4h
Security Freeze Lock – F5h Security Freeze Lock – F6h Format Track - 50h This command writes the desired head and cylinder of the selected drive with a vendor unique data pattern (typically FFh or 00h). To remain host backward compatible, the CompactFlash Storage Card expects a sector buffer of data from the host to follow the command with the same protocol as the Write Sector(s) command although the information in the buffer is not used by the CompactFlash Storage Card.
Initialize Drive Parameters - 91h This command enables the host to set the number of sectors per track and the number of heads per cylinder. Only the Sector Count and the Card/Drive/Head registers are used by this command.
Wear Level - F5h Write Verify - 3Ch
Error Posting
Error and Status Register summarizes the valid status and error value for all the CF-ATA Command set.
ID Table Information of True IDE Mode Word Address Default Value Total Bytes 0 4A04h 2 General configuration - signature for the CompactFlash Storage Card 1 XXXXh 2 Default number of cylinders 2 0000h 2 Reserved 3 00XXh 2 Default number of heads 4 0000h 2 Obsolete 5 0240h 2 Obsolete 6 XXXXh 2 Default number of sectors per track 7-8 XXXXh 4 Number of sectors per card (Word 7 = MSW, Word 8 = LSW) 9 0000h 2 Obsolete 10-19 aaaa 20 Serial number in ASCII (Right Justif
Word Address Default Value Total Bytes 69-79 0000h 20 Reserved 80-81 0000h 4 Reserved – CF cards do not return an ATA version 82 702Bh 2 Command sets supported 0 83 500Ch 2 Command sets supported 1 84 4000h 2 Command sets supported 2 85 0000h 2 Command sets enabled 0 86 0000h 2 Command sets enabled 1 87 0000h 2 Command sets enabled 2 88 003Fh 2 Ultra DMA Mode Supported and Selected 89 0001h 2 Time required for Security erase unit completion 90 0000h 2 Time re
Bit 15-12: Configuration Flag If bits 15:12 are set to 8h then Word 0 shall be 848Ah. If bits 15:12 are set to 0h then Bits 11:0 are set using the definitions below and the Card is required to support for the CFA command set and report that in bit 2 of Word 83. Bit 15:12 values other than 8h and 0h are prohibited. Bits 11-8: Retired These bits have retired ATA bit definitions.
Bit 13: Standby Timer If bit 13 is set to 1 then the Standby timer is supported as defined by the IDLE command If bit 13 is set to 0 then the Standby timer operation is defined by the vendor. Bit 11: IORDY Supported If bit 11 is set to 1 then this CompactFlash Storage Card supports IORDY operation. If bit 11 is set to 0 then this CompactFlash Storage Card may support IORDY operation. Bit 10: IORDY may be disabled Bit 10 shall be set to 0, indicating that IORDY may not be disabled.
supports Multiword DMA modes 1 and 0. Bit 2, if set to one, indicates that the CompactFlash Storage Card supports Multiword DMA modes 2, 1 and 0. Support for Multiword DMA modes 3 and above are specific to CompactFlash are reported in word 163, Word 163: CF Advanced True IDE Timing Mode Capabilities and Settings. Word 64: Advanced PIO transfer modes supported Bits 7 through 0 of word 64 of the Identify Device parameter information is defined as the advanced PIO data transfer supported field.
Words 82, 83, and 84 shall indicate features/command sets supported. The value 0000h or FFFFh was placed in each of these words by CompactFlash Storage Cards prior to ATA-3 and shall be interpreted by the host as meaning that features/command sets supported are not indicated. Bits 1 through 13 of word 83 and bits 0 through 13 of word 84 are reserved.
command. Bit 14 of word 85 shall be set to one; the CompactFlash Storage Card supports the NOP command. Bit 15 of word 85 is obsolete. Bit 0 of word 86 shall be set to zero; the CompactFlash Storage Card does not support the Download Microcode command. Bit 1 of word 86 shall be set to zero; the CompactFlash Storage Card does not support the Read DMA Queued and Write DMA Queued commands. If bit 2 of word 86 shall be set to one, the CompactFlash Storage Card supports the CFA feature set.
Bit 8: Security Level If set to 1, indicates that security mode is enabled and the security level is maximum. If set to 0 and security mode is enabled, indicates that the security level is high. Bit 5: Enhanced security erase unit feature supported If set to 1, indicates that the Enhanced security erase unit feature set is supported. Bit 4: Expire If set to 1, indicates that the security count has expired and Security Unlock and Security Erase Unit are command aborted until a power-on reset or hard reset.
2 3-7 PIO Mode 6 Reserved Value 0 1 2 3-7 Bits 5-3: Advanced True IDE Multiword DMA Mode Support Indicates the maximum True IDE Multiword DMA mode supported by the card. Maximum Multiword DMA timing mode supported Specified in word 63 Multiword DMA Mode 3 Multiword DMA Mode 4 Reserved Value 0 1 2 3-7 Bits 8-6: Advanced True IDE PIO Mode Selected Indicates the current True IDE PIO mode selected on the card.
4-7 Reserved
SMART Command Set SMART Command Set SMART Feature Register Values D0h Read Data D5h Read Log D1h Read Attribute Threshold D6h Write Log D2h Enable/Disable Autosave D8h Enable SMART Operations D3h Save Attribute Values D9h Disable SMART Operations D4h Execute OFF-LINE Immediate DAh Return Status 1. If reserved size is below the Threshold, the status can be read from Cylinder register by Return Status command (DAh).
the commands executed by the device. X=the content of the byte is vendor specific and may be fixed or variable. R=the content of the byte is reserved and shall be zero. * 4 Byte value : [MSB] [2] [1] [LSB] The technical information above is based on CFA standard data and tested to be reliable. However, Transcend makes no warranty, either expressed or implied, as to its accuracy and assumes no liability in connection with the use of this product.
Ordering Information TS XG CF220I Transcend Product Capacity: 128M-512M = 128 MB up to 512 MB 1G-4G = 1 GB up to 4 GB Extreme Industrial CF card 1. The technical information above is based on industry standard data and has been tested to be reliable. However, Transcend makes no warranty, either expressed or implied, as to its accuracy and assumes no liability in connection with the use of this product. Transcend reserves the right to make changes to the specifications at any time without prior notice.
Revision History Version Date V1.
