Data Sheet

14
5.2.4 StaticDataRefresh Technology
Normally, ECC engine corrections are taken place without affecting the host normal operations. As time
passes by, the number of error bits accumulated in the read transaction exceeds the correcting capability
of the ECC engine, resulting in corrupted data being sent to the host. To prevent this, the controller
monitors the error bit levels at each read operation; when it reaches the preset threshold value, the
controller automatically performs data refresh to “restore” the correct charge levels in the cell. This
implementation practically restores the data to its original, error-free state, and hence, lengthening the life
of the data.
5.2.5 PS(Power shield) Function
Power Shield (PS) is a basic technology supported by all Transcend's embedded SSDs to prevent internal
NAND flash data loss in event of a sudden power outage. The internal voltage detection circuit (VDT) of the
controller monitors the external power supply. When the external voltage drops from 5V to 4V or from
3.3V to 2.7V, the VDT activates the PS detection mechanism. When a sudden power outage occurs, the
internal power shield circuit would trigger the PS function so that the controller will stop accepting new
write commands. The write operation is terminated to ensure that the firmware and the data in the NAND
flash are undamaged.
When the external voltage drops to a certain level, the internal voltage detection circuit (VDT) of the
controller activates the PS mechanism. The SSD controller then stops accepting new write commands from
the host, ensuring the integrity of existing data for the NAND flash.
The PS function ensures the safety of the data which has already been written into the flash before sudden
power outage.
5.2.6 DEVSLP Function
DevSlp or DevSleep (regarded as device sleep or SATA DEVSLP) is a feature in SATA SSD which allows them
to go into a low power "device sleep" mode when sent the appropriate signal, which uses one or two
orders of magnitude less power than a traditional idle (about 5 mW). This function can save more battery
power in platform idle, so that the user can operate the platform for longer time.
5.2.7 AES-256 Function(Optional)
Defined by the National Institute of Standards and Technology (NIST) under the Federal Information
Processing Standards Publication 197 (FIPS PUB 197), the Advanced Encryption Standard (AES) specifies a
FIPS-approved cryptographic algorithm that can be used to protect electronic data.
Transcend Information’s SSDs equipped with hardware-based AES-256 encryption offer superior data
protection and performance compared to competing offerings that utilize software-based or
firmware-based encryption. With hardware-based encryption, all data is encrypted before being stored in
NAND Flash. After the encrypted data has been written into the flash, it becomes virtually impossible to
decrypt the data without the original key. Performance is also improved compared to software-based
solutions, since hardware-based encryption does not require system resources to perform the
encryption/decryption process.