Datasheet

ManualsBrandsTranscend Manualscomputer componentsTS64MLD64V6F5

184PIN DDR266 Unbuffered DIMM

512MB With 32Mx8 CL2.5

Transcend Information Inc.

Description

The TS64MLD64V6F5 is a 64Mx64bits Double Data Rate

SDRAM high density for PC-266. The TS64MLD64V6F5

consists of 16pcs CMOS 32Mx8 bits Double Data Rate

SDRAMs in 66 pin TSOP-II 400mil packages and a 2048

bits serial EEPROM on a 184-pin printed circuit board.

The TS64MLD64V6F5 is a Dual In-Line Memory Module

and is intended for mounting into 184-pin edge connector

sockets.

Synchronous design allows precise cycle control with the

use of system clock. Data I/O transactions are possible

on both edges of DQS. Range of operation frequencies,

programmable latencies allow the same device to be

useful for a variety of high bandwidth, high performance

memory system applications.

Features

• Power supply: VDD: 2.5V ± 0.2V, VDDQ: 2.5V ± 0.2V

• Max clock Freq: 133MHZ.

• Double-data-rate architecture; two data transfers per

clock cycle

• Differential clock inputs (CK and /CK)

• DLL aligns DQ and DQS transition with CK transition

• Auto and Self Refresh 7.8us refresh interval.

• Data I/O transactions on both edge of data strobe.

• Edge aligned data output, center aligned data

• input.

• Serial Presence Detect (SPD) with serial EEPROM

• SSTL-2 compatible inputs and outputs.

• MRS cycle with address key programs.

CAS Latency (Access from column address): 2.5

Burst Length (2, 4, 8)

Data Sequence (Sequential & Interleave)

Placement

PCB: 09-1397

Summary of content (11 pages)

PAGE 1
84PIN DDR266 Unbuffered DIMM 512MB With 32Mx8 CL2.5 TS64MLD64V6F5 1Description Placement The TS64MLD64V6F5 is a 64Mx64bits Double Data Rate SDRAM high density for PC-266. The TS64MLD64V6F5 consists of 16pcs CMOS 32Mx8 bits Double Data Rate SDRAMs in 66 pin TSOP-II 400mil packages and a 2048 bits serial EEPROM on a 184-pin printed circuit board. The TS64MLD64V6F5 is a Dual In-Line Memory Module and is intended for mounting into 184-pin edge connector sockets.
PAGE 2
184PIN DDR266 Unbuffered DIMM 512MB With 32Mx8 CL2.5 TS64MLD64V6F5 Dimensions Pin Identification Side Millimeters Inches A 133.35±0.20 5.250±0.008 B 72.39 2.850 C 6.35 0.250000 D 2.20 0.0870 E 30.48±0.20 1.200±0.008 F 19.80 0.779 G 4.00 0.157 H 12.00 I 1.27±0.10 Symbol A0~A12,BA0,BA1 Address input DQ0~DQ63, Data Input / Output. DQS0~DQS7 Data strobe input/output CK0, /CK0, CK1, /CK1, CK2, /CK2 Clock Input. CKE0,CKE1 Clock Enable Input. 0.
PAGE 3
184PIN DDR266 Unbuffered DIMM 512MB With 32Mx8 CL2.
PAGE 4
184PIN DDR266 Unbuffered DIMM 512MB With 32Mx8 CL2.
PAGE 5
184PIN DDR266 Unbuffered DIMM 512MB With 32Mx8 CL2.5 TS64MLD64V6F5 ABSOLUTE MAXIMUM RATINGS Parameter Symbol Value Unit Voltage on any pin relative to Vss VIN, VOUT -0.5 ~ 3.6 V Voltage on VDD supply to Vss VDD, VDDQ -1.0 ~ 3.
PAGE 6
184PIN DDR266 Unbuffered DIMM 512MB With 32Mx8 CL2.5 TS64MLD64V6F5 DC CHARACTERISTICS (Recommended operating condition unless otherwise noted,VDD=2.7V TA = 10°C) Parameter Symbol Operating current - One bank Active-Precharge; tRC=tRCmin; DQ, DM and DQS inputs changing twice per clock cycle; Address and control inputs changing once per clock cycle Operating current - One bank operation; One bank open, Burst=4; Reads - Refer to the following page for detailed test condition.
PAGE 7
184PIN DDR266 Unbuffered DIMM 512MB With 32Mx8 CL2.5 TS64MLD64V6F5 AC OPERATING CONDITIONS Parameter Input High (Logic 1) Voltage, DQ, DQS and DM signals Input Low (Logic 0) Voltage, DQ, DQS and DM signals Input Differential Voltage, CK and /CK inputs Input Crossing Point Voltage, CK and /CK inputs Symbol VIH(AC) VIL(AC) VID(AC) VIX(AC) Min VREF + 0.31 0.7 0.5*VDDQ - 0.2 Max Unit Note VREF - 0.31 VDDQ + 0.6 0.5*VDDQ + 0.2 V V V V 3 3 1 2 Note: 1.
PAGE 8
184PIN DDR266 Unbuffered DIMM 512MB With 32Mx8 CL2.5 TS64MLD64V6F5 AC Timing Parameters & Specifications (These AC characteristics were tested on the Component) Parameter Row cycle time Refresh row cycle time Row active time /RAS to /CAS delay Row active to Row active delay Row active to Row active delay Write recovery time Last data in to Read command Col. Address to Col.
PAGE 9
TS64MLD64V6F5 184PIN DDR266 Unbuffered DIMM 512MB With 32Mx8 CL2.5 SIMPLIFIED TRUTH TABLE (V=Valid, X=Don’t Care, H=Logic High, L=Logic Low) COMMAND CKEn-1 CKEn /CS /RAS /CAS /WE X L L L L OP CODE 1,2 X L L L L OP CODE 1,2 L L L H X Register Extended Mode Register Set H Register Mode Register Set H Auto Refresh Refresh Self Refresh Entry Exit Bank Active & Row Addr.
PAGE 10
184PIN DDR266 Unbuffered DIMM 512MB With 32Mx8 CL2.5 TS64MLD64V6F5 Serial Presence Detect Specification Serial Presence Detect Byte No. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Function Described # of Bytes Written into Serial Memory Total # of Bytes of S.P.
PAGE 11
184PIN DDR266 Unbuffered DIMM 512MB With 32Mx8 CL2.5 TS64MLD64V6F5 64-71 72 Manufacturers JEDEC ID Manufacturing Location Transcend T 7F, 4F 54 54 53 36 34 4D 4C 73-90 Manufacturers Part Number TS64MLD64V6F5 44 36 34 56 36 46 35 20 20 20 20 20 91-92 93-94 95-98 99-127 128~255 Revision Code Manufacturing Date Assembly Serial Number Manufacturer Specific Data Unused Storage Locations Transcend Information Inc.