Datasheet

TMC4671 Datasheet • IC Version V1.00 | Document Revision V1.03 • 2018-Sept-06

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4.4.1 ADC Group A and ADC Group B

ADC inputs of the TMC4671 are grouped into two groups, to enable diﬀerent sample rates for two groups

of analog signals if needed. For all applications both groups should work with the same sampling rates.

necessary to run its ADC channels with a much higher bandwidth than the ADC channels for current

measurement.

4.4.2 Internal Delta Sigma ADCs

The TMC4671 is equipped with internal delta sigma ADCs for current measurement, supply voltage

measurement, analog GPIs and analog encoder signal measurement. Delta sigma ADCs, as integrated

within the TMC4671, together with programmable digital ﬁlters are ﬂexible in parameterizing concerning

resolution vs. speed. The advantage of delta sigma ADCs is that the user can adjust measurement from

lower speed with higher resolution to higher speed with lower resolution. This ﬁts with motor control

application. Higher resolution is required for low speed signals, while lower resolution satisﬁes the needs

for high speed signals.

Due to high oversampling, the analog input front-end is easier to implement than for successive approxi-

mation register ADCs as anti aliasing ﬁlters can be chosen to a much higher cutoﬀ frequency. The ADC

Engine processes all ADC channels in parallel hardware - avoiding phase shifts between the channels

compared to ADC channels integrated in MCUs.

An analog voltage V_IN of an analog input is mapped to a raw ADC value ADC_RAW.

4.4.3 External Delta Sigma ADCs

The delta sigma front-end of the ADC engine supports external delta sigma modulators to enable isolated

delta sigma modulators for the TMC4671. Additionally, the delta sigma front-end supports low-cost

comparators together with two resistors and one capacitor (R-C-R-CMP) forming ﬁrst order delta sigma

modulators, as generic analog front-end for pure digital variants of the TMC4671 core.

4.4.3.1 ADC RAW

The sampled raw ADC values are available for read out by the user. This is important during the system

setup phase to determine oﬀset and scaling factors.

4.4.3.2 ADC EXT

The user can write ADC values into the ADC_EXT registers of the register bank from external sources. These

values can be selected as raw current ADC values by selection. ADC_EXT registers are primarily intended

for test purposes as optional inputs for external current measurement sources.

4.5 Delta Sigma Conﬁguration and Timing Conﬁguration

The delta sigma conﬁguration is programmed via MCFG register that selects the mode (internal/external

delta sigma modulator with ﬁxed internal 100MHz system clock or with programmable MCLK; delta sigma

modulator clock mode (MCLK output, MCLK input, MCLK used as MDAC output with external R-C-R-CMP

conﬁguration); delta sigma modulator clock and its polarity; and the polarity of the delta sigma modulator

data signal MDAT).

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