Datasheet

TMC4671 Datasheet • IC Version V1.00 | Document Revision V1.03 • 2018-Sept-06
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The coefficients a_0 and b_1 are represented in Q2.30 format. Registers for parametrization of feed-forward
control structure are feed_forward_velocity_gain, feed_forward_velocity_filter_constant, feed_forward_torque_gain,
and feed_forward_torque_filter_constant.
The input target value to the velocity feed-forward entity is the filtered position target value. For the torque
feed-forward entity the output of the velocity feed-forward entity is used. Sampling time for both entities’
integrators is fixed to the PWM frequency.
4.10 PWM Engine
The PWM engine takes care of converting voltage vectors to pulse width modulated (PWM) control signals.
These digital PWM signals control the gate drivers of the power stage. For a detailed description of the
PWM control registers and PWM register control bits pls. refer section 6 page 56.
The ease-of-use PWM engine requires just a couple of parameter settings. Primarily, the polarities for the
gate control signal of high-side and low-side must be set. The power on default PWM mode is 0, meaning
PWM = OFF. For operation, the centered PWM mode must be switched on by setting the PWM mode to 7.
A single bit switches the space vector PWM (SVPWM) on. For 3-phase PMSM, the SVPWM = ON gives more
effective voltage. Nevertheless, for some applications it makes sense to switch the SVPWM = OFF to keep
the star point voltage of a motor almost at rest.
4.10.1 PWM Polarities
The PWM polarities register (PWM_POLARITIES) controls the polarities of the control signals. Positive
polarity for gate control means 1 represents ON and 0 represents OFF. The gate control signal polarities
are individually programmable for low-side gate control and for high-side gate control. The PWM polarities
register controls the polarity of other control signals as well.
4.10.2 PWM Frequency
The PWM counter maximum length register PWM_MAXCNT controls the PWM frequency. For a clock
frequency fCLK = 25 MHz, the PWM frequency fPWM[Hz] = (4.0 · fCLK [Hz]) / (PWM_MAXCNT + 1). With
fCLK = 25 MHz and power-on reset (POR) default of PWM_MAXCNT=3999, the PWM frequency fPWM =
25 kHz. The PWM frequency fPWM is recommended to be in the range of 25 kHz to 100 kHz by setting
PWM_MAXCNT between 3999 to 999.
Note
The PWM frequency is the fundamental frequency of the control system. It can be
changed at any time, also during motion for the classic PI controller structure. The
advanced PI controller structure is tied to the PWM frequency and integrator gains
have to be changed. Please make sure to set current measurement decimation
rates to fit PWM period in high performance applications.
Info
Please be informed that later versions of the chip will support lower PWM fre-
quencies. This might affect the user’s software.
4.10.3 PWM Resolution
The base resolution of the PWM is 12 bit internally mapped to 16 bit range. The minimal PWM increment
is 20ns due to the symmetrical PWM with 100 MHz counter frequency. MAX_PWMCNT = 4095 gives the
full resolution of 12 bit with ≈ 25 kHz w/ fCLK=25 MHz. MAX_PWMCNT=2047 results in 11 bit resolution,
but with ≈ 50kHz w/ fCLK=25 MHz. So the PWM_MAXCNT defines the PWM frequency, but also affects the
resolution of the PWM.
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