Datasheet

TMC4671 Datasheet • IC Version V1.00 | Document Revision V1.03 • 2018-Sept-06
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Address Registername Access
2: ext. dsMOD with MCLK output
3: ext. dsMOD with ext. CMP
Mask Name Type
0x00040000
h
mclk_polarity_b Bool
Min Max Default Unit
0 1 0
0: Data is sampled on rising edge
1: Data is sampled on falling edge
Mask Name Type
0x00080000
h
mdat_polarity_b Bool
Min Max Default Unit
0 1 0
0: MDAT is not inverted
1: MDAT is inverted
Mask Name Type
0x00100000
h
sel_nclk_mclk_i_b Bool
Min Max Default Unit
0 1 0
0: MCLK is used (divided clock)
1: CLK (100 MHz) is used
Mask Name Type
0xFF000000
h
blanking_b Unsigned
Min Max Default Unit
0 255 0
0x05
h
dsADC_MCLK_A RW
Mask Name Type
0xFFFFFFFF
h
dsADC_MCLK_A Unsigned
Min Max Default Unit
0 4294967295 214748365
fMCLK_A = 2
31
/ (fCLK * (dsADC_MCLK_A+1)), dsADC_MCLK_A =
(2
31
/ (fMCLK * fCLK)) - 1
0x06
h
dsADC_MCLK_B RW
Mask Name Type
0xFFFFFFFF
h
dsADC_MCLK_B Unsigned
Min Max Default Unit
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