Data Sheet

THUNDERCOMM TurboX C403-C Datasheet
29
3.3.9 JTAG Interface
The SoM has a JTAG interface for debug.
JTAG Interface
Pin Name
PIN Location
Voltage
Type
Description
Notes
JTAG_SRST_N
E33
-
DI,PU
JTAG reset for debug
JTAG_TCK
E34
-
DI,PU
JTAG clock input
JTAG_TDI
E35
-
DI,PU
JTAG data input
JTAG_TDO
E36
-
-
JTAG data output
JTAG_TMS
E37
-
B,PU
JTAG mode-select input
JTAG_TRST_N
E38
-
DI,PD
JTAG reset
QCS_RESIN_N
C2
1.8V
DI
System reset input
QCS_PS_HOLD
D8
1.8V
DI
Power supply hold control
input
Table 3-10 SSC interface definition
3.3.10 SDIO Interface
The SoM support dual 4-laneSDIO, SDC2 connect to SD-card.
The SDIO is high-speed signal group. It should protect other sensitive signals/circuits from SD corruption, and
protect SD signals from noisy signals (clock, RF and so on).
➢ The clock can be up to 50 Mhz.
➢ The signals routing should be 36-50ohm impedance control.
➢ CLK to DATA/CMD length matching less than 2mm.
➢ The spacing to all other signals should 2X line width
➢ Maximum bus capacitance less than 1.0pF.
➢ Each trace needs to be next to a ground plane.
SDIO (SDC2)Interface
Pin Name
PIN Location
Voltage
Type
Description
Notes
SDC2 _CLK
A14
P2
DO
Secure digital controller 2 clock
SDC2 _CMD
B16
P2
IO
Secure digital controller 2 command
SDC2_DATA_3
A16
P2
IO
Secure digital controller 2 data bit 3
SDC2_DATA_2
B14
P2
IO
Secure digital controller 2 data bit 2
SDC2_DATA_1
A15
P2
IO
Secure digital controller 2 data bit 1
SDC2_DATA_0
B15
P2
IO
Secure digital controller 2 data bit 0
GPIO_59
B28
P3
DI
SD_CARD_DET_N need pull up to P3
Table 3-11 SDIO interface definition