User Manual

LARA-R2 series - System Integration Manual
UBX-16010573 - R02 Objective Specification System description
Page 11 of 148
1.3 Pin-out
Table 3 lists the pin-out of the LARA-R2 series modules, with pins grouped by function.
Function
Pin Name
Pin No
I/O
Description
Remarks
Power
VCC
51, 52, 53
I
Module supply input
VCC supply circuit affects the RF performance and
compliance of the device integrating the module with
applicable required certification schemes.
See section 1.5.1 for description and requirements.
See section 2.2.1 for external circuit design-in.
GND
1, 3, 5, 14, 20,
22, 30, 32, 43,
50, 54, 55, 57,
58, 60, 61, 63,
64, 65-96
N/A
Ground
GND pins are internally connected each other.
External ground connection affects the RF and thermal
performance of the device.
See section 1.5.1 for functional description.
See section 2.2.1 for external circuit design-in.
V_BCKP
2
I/O
RTC supply
input/output
V_BCKP = 1.8 V (typical) generated by internal regulator
when valid VCC supply is present.
See section 1.5.2 for functional description.
See section 2.2.2 for external circuit design-in.
V_INT
4
O
Generic Digital
Interfaces supply
output
V_INT = 1.8 V (typical), generated by internal DC/DC
regulator when the module is switched on.
Test-Point for diagnostic access is recommended.
See section 1.5.3 for functional description.
See section 2.2.3 for external circuit design-in.
System
PWR_ON
15
I
Power-on input
Internal 10 k pull-up resistor to V_BCKP.
See section 1.6.1 for functional description.
See section 2.3.1 for external circuit design-in.
RESET_N
18
I
External reset input
Internal 10 k pull-up resistor to V_BCKP.
Test-Point for diagnostic access is recommended.
See section 1.6.3 for functional description.
See section 2.3.2 for external circuit design-in.
HOST_SELECT
21
I/O
Selection of module /
host configuration
Not supported by “02” product versions.
Pin available to select, enable, connect, disconnect and
subsequently re-connect the HSIC interface.
Test-Point for diagnostic access is recommended.
See section 1.6.4 for functional description.
See section 2.3.3 for external circuit design-in.
Antenna
ANT1
56
I/O
Primary antenna
Main Tx / Rx antenna interface.
50  nominal characteristic impedance.
Antenna circuit affects the RF performance and compliance
of the device integrating the module with applicable
required certification schemes.
See section 1.7 for description and requirements.
See section 2.4 for external circuit design-in.
ANT2
62
I
Secondary antenna
Rx only for Rx diversity.
50  nominal characteristic impedance.
Antenna circuit affects the RF performance and compliance
of the device integrating the module with applicable
required certification schemes.
See section 1.7 for description and requirements.
See section 2.4 for external circuit design-in.
ANT_DET
59
I
Input for antenna
detection
ADC for antenna presence detection function.
See section 1.7.2 for functional description.
See section 2.4.2 for external circuit design-in.