User Manual

LARA-R2 series - System Integration Manual
UBX-16010573 - R02 Objective Specification Appendix
Page 142 of 148
SARA-U2
LARA-R2
Pin No
Pin Name
Description
Pin Name
Description
Remarks for migration
26
SDA
I
2
C Data I/O
1.8 V, open drain
Driver strength: 1 mA
SDA
I
2
C Data I/O
1.8 V, open drain
Driver strength: 1 mA
No functional difference
27
SCL
I
2
C Clock Output
1.8 V, open drain
Driver strength: 1 mA
SCL
I
2
C Clock Output
1.8 V, open drain
Driver strength: 1 mA
No functional difference
28
USB_D-
USB Data I/O (D-)
High-Speed USB 2.0
USB_D-
USB Data I/O (D-)
High-Speed USB 2.0
No functional difference
29
USB_D+
USB Data I/O (D+)
High-Speed USB 2.0
USB_D+
USB Data I/O (D+)
High-Speed USB 2.0
No functional difference
30
GND
Ground
GND
Ground
31
RSVD
Reserved
RSVD
Reserved
No functional difference
32
GND
Ground
GND
Ground
33
RSVD
Reserved
To be externally connected to GND
RSVD
Reserved
To be externally connected to GND
No functional difference
34
I2S_WA
I
2
S Word Alignment I/O, or GPIO
1.8 V, Driver strength: 2 mA
I2S_WA
I
2
S Word Alignment I/O
21
, or GPIO
1.8 V, Driver strength: 6 mA
No functional difference
35
I2S_TXD
I
2
S Data Output, or GPIO
1.8 V, Driver strength: 2 mA
I2S_TXD
I
2
S Data Output
21
, or GPIO
1.8 V, Driver strength: 6 mA
No functional difference
36
I2S_CLK
I
2
S Clock I/O, or GPIO
1.8 V, Driver strength: 2 mA
I2S_CLK
I
2
S Clock I/O
21
, or GPIO
1.8 V, Driver strength: 6 mA
No functional difference
37
I2S_RXD
I
2
S Data Input, or GPIO
1.8 V, Inner pull-down: ~9 k
I2S_RXD
I
2
S Data Input
21
, or GPIO
1.8 V, Inner pull-down: ~7.5 k
No functional difference
38
SIM_CLK
SIM Clock Output
SIM_CLK
SIM Clock Output
No functional difference
39
SIM_IO
SIM Data I/O
SIM_IO
SIM Data I/O
No functional difference
40
SIM_RST
SIM Reset Output
SIM_RST
SIM Reset Output
No functional difference
41
VSIM
SIM Supply Output
VSIM
SIM Supply Output
No functional difference
42
SIM_DET
1.8V SIM Detection
SIM_DET
1.8 V GPIO settable as SIM Detection
No functional difference
43
GND
Ground
GND
Ground
44
RSVD
Reserved
SDIO_D2
1.8 V, SDIO serial data [2]
22
RSVD  SDIO
45
RSVD
Reserved
SDIO_CLK
1.8 V, SDIO serial clock
22
RSVD  SDIO
46
RSVD
Reserved
SDIO_CMD
1.8 V, SDIO command
22
RSVD  SDIO
47
RSVD
Reserved
SDIO_D0
1.8 V, SDIO serial data [0]
22
RSVD  SDIO
48
RSVD
Reserved
SDIO_D3
1.8 V, SDIO serial data [3]
22
RSVD  SDIO
49
RSVD
Reserved
SDIO_D1
1.8 V, SDIO serial data [1]
22
RSVD  SDIO
50
GND
Ground
GND
Ground
51-53
VCC
Module Supply Input
Normal range: 3.3 V – 4.4 V
Extended range: 3.1 V – 4.5 V
VCC
Module Supply Input
Normal range: 3.3 V – 4.4 V
Extended range: 3.0 V – 4.5 V
No functional difference
Larger range for LARA-R2
54-55
GND
Ground
GND
Ground
56
ANT
RF Antenna Input/Output
ANT1
RF Antenna Input/Output (primary)
No functional difference
57-58
GND
Ground
GND
Ground
59
GND
Ground
ANT_DET
Antenna Detection Input
GND  ANT_DET
60-61
GND
Ground
GND
Ground
62
ANT_DET
Antenna Detection Input
ANT2
RF Antenna Input (secondary)
ANT_DET  ANT2
63-96
GND
Ground
GND
Ground
97-98
-
Not Available
RSVD
Reserved
No functional difference
99
-
Not Available
HSIC_DATA
HSIC USB data line
22
Not Available  HSIC
100
-
Not Available
HSIC_STRB
HSIC USB strobe line
22
Not Available  HSIC
Table 52: SARA-U2 and LARA-R2 series modules pin assignment with remarks for migration
For further details regarding the characteristics, capabilities, usage or settings applicable for each interface of the
SARA-U2 and LARA-R2 series modules, see LARA-R2 series Data Sheet [1], SARA-U2 series Data Sheet [27],
SARA-G3 / SARA-U2 series System Integration Manual [28], u-blox AT Commands Manual [2] and Nested Design
Application Note [26].
21
Not supported by LARA-R204 module “02” product version.
22
Not supported by “02” product versions.