User Manual

LARA-R2 series - System Integration Manual
UBX-16010573 - R02 Objective Specification Appendix
Page 143 of 148
A.3 Schematic for SARA-U2 and LARA-R2 integration
Figure 75 shows an example of schematic diagram where a SARA-U2 or a LARA-R2 series module can be
integrated into the same application board, using all the available interfaces and functions of the modules. The
different mounting options for the external parts are herein remarked according to the functions supported by
each module.
TXD
RXD
RTS
CTS
DTR
DSR
RI
DCD
GND
12 TXD
9 DTR
13 RXD
10 RTS
11 CTS
6 DSR
7 RI
8 DCD
GND
3V8
GND
330µF
10nF100nF 56pF
SARA-U2 series / LARA-R2 series
52 VCC
53 VCC
51 VCC
+
100µF
2 V_BCKP
GND GND
GND
RTC
back-up
1.8V DTE
USB 2.0 Host
16 GPIO1
3V8
Network
Indicator
18 RESET_N
Application
Processor
Open
Drain
Output
15 PWR_ON
Open
Drain
Output
D+
D-
29 USB_D+
28 USB_D–
15pF
RSVD
GND
TP
TP
0Ω
0Ω
TP
TP
0Ω
0Ω
TP
TP
47pF
SIM Card Holder
CCVCC (C1)
CCVPP (C6)
CCIO (C7)
CCCLK (C3)
CCRST (C2)
GND (C5)
47pF 47pF 100nF
41VSIM
39SIM_IO
38SIM_CLK
40SIM_RST
47pF
SW1
SW2
4V_INT
42SIM_DET / GPIO5
470k
ESD ESD ESD ESD ESD ESD
1k
TP
V_INT
RSVD / SDIO_CMD
RSVD / SDIO_D0
RSVD / SDIO_D3
RSVD / SDIO_D1
46
47
48
49
RSVD / SDIO_D2
RSVD / SDIO_CLK
44
45
VBUS 17 VUSB_DET
100nF
62ANT_DET / ANT2
59GND / ANT_DET
10k
Connector
27pF
ESD
Secondary
Cellular
Antenna
33pF
82nH
82nH
56
Connector
Primary
Cellular
Antenna
33pF
ANT / ANT1
V_INT
BCLK
LRCLK
Audio Codec
MAX9860
SDIN
SDOUT
SDA
SCL
36I2S_CLK
34I2S_WA
35I2S_TXD
37I2S_RXD
19CODEC_CLK / GPIO6 MCLK
IRQn
10k
10µF1µF100nF
VDD
SPK
OUTP
OUTN
MIC
MICBIAS
1µF
2.2k
1µF
1µF
MICLN
MICLP
MICGND
2.2k
ESD ESD
V_INT
10nF10nF
EMI
EMI
27pF27pF
10nF
EMI
EMI
ESD ESD
27pF27pF10nF
33 RSVD
99 HSIC_DATA
100 HSIC_STRB
21 GND / HOST_SELECT
TP
TP
8.2pF
Mount for modules
supporting 2G
Mount for modules
supporting LTE band-7
24GPIO3
V_INT
B1 A1
GND
B2 A2
VCCB VCCA
SN74AVC2T245
Voltage Translator
100nF
100nF
3V0
TxD1
4.7k
IN
OUT
LDO Regulator
SHDNn
4.7k
3V8 3V0
23GPIO2
V_INT
SDA_A
SDA_B
GND
SCL_A
SCL_B
VCCA
VCCB
TCA9406DCUR
I2C Voltage Translator
100nF
100nF
100nF
47k
SDA2
SCL2
VCC
DIR1
DIR2OEn
OE
GND
EXTINT0GPIO4 25
4.7k4.7k
u-blox GNSS
3.0 V receiver
26SDA
27SCL
GND
100k
0Ω
10k
Mount for
SARA-U2
Mount for
LARA-R2
Mount for
LARA-R2
0Ω
Mount for
SARA-U2
Not supported by LARA-R2 series “02” product version
0Ω
TP
0Ω
TP
0Ω
TP
0Ω
TP
0Ω
TP
15pF
39nH
0Ω for LARA-R2
0Ω
BLM18EG221SN1 for SARA-U201
0Ω otherwise
Mount for
SARA-U2
Not supported by LARA-R204 module “02” product version
Figure 75: Example of complete schematic diagram to integrate SARA-U2 and LARA-R2 modules on the same application board