User Manual

LARA-R2 series - System Integration Manual
UBX-16010573 - R02 Objective Specification System description
Page 26 of 148
1.5.3 Generic digital interfaces supply output (V_INT)
The V_INT output pin of the LARA-R2 series modules is connected to an internal 1.8 V supply with current
capability specified in the LARA-R2 series Data Sheet [1]. This supply is internally generated by a switching step-
down regulator integrated in the Power Management Unit and it is internally used to source the generic digital
I/O interfaces of the cellular module, as described in Figure 11. The output of this regulator is enabled when the
module is switched on and it is disabled when the module is switched off.
Baseband
Processor
51
VCC
52
VCC
53
VCC
4
V_INT
Switching
Step-Down
Digital I/O
Interfaces
Power
Management
LARA-R2 series
Figure 11: LARA-R2 series interfaces supply output (V_INT) simplified block diagram
The switching regulator operates in Pulse Width Modulation (PWM) mode for greater efficiency at high output
loads and it automatically switches to Pulse Frequency Modulation (PFM) power save mode for greater efficiency
at low output loads. The V_INT output voltage ripple is specified in the LARA-R2 series Data Sheet [1].